| /openbmc/qemu/hw/ppc/ |
| H A D | ppc4xx_devs.c | 184 Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev); in ppc4xx_mal_realize() local
319 Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev); in ppc405_plb_realize() local
509 Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev); in ppc405_ebc_realize() local
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| H A D | ppc4xx_sdram.c | 389 Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev); in ppc4xx_sdram_ddr_realize() local
650 Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev); in ppc4xx_sdram_ddr2_realize() local
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| H A D | ppc.c | 1444 ppc_dcrn_t *dcr; in ppc_dcr_read() local
1465 ppc_dcrn_t *dcr; in ppc_dcr_write() local
1488 ppc_dcrn_t *dcr; in ppc_dcr_register() local
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| /openbmc/u-boot/drivers/rtc/ |
| H A D | imxdi.c | 30 u32 dcr; /* Control Reg */ member
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| /openbmc/qemu/hw/intc/ |
| H A D | ppc-uic.c | 248 Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev); in ppc_uic_realize() local
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| /openbmc/u-boot/drivers/timer/ |
| H A D | stm32_timer.c | 44 u32 dcr; member
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| /openbmc/qemu/hw/i3c/ |
| H A D | core.c | 557 I3CTarget *i3c_target_new(const char *name, uint8_t addr, uint8_t dcr, in i3c_target_new()
582 uint8_t dcr, uint8_t bcr, uint64_t pid) in i3c_target_create_simple()
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| H A D | dw-i3c.c | 1452 uint8_t bcr, uint8_t dcr, uint8_t addr) in dw_i3c_update_char_table()
1521 uint8_t dcr; in dw_i3c_addr_assign_cmd() member
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| /openbmc/u-boot/drivers/mmc/ |
| H A D | ftsdc010_mci.c | 195 uint32_t dcr; in ftsdc010_request() local
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| /openbmc/qemu/include/hw/i3c/ |
| H A D | i3c.h | 139 uint8_t dcr; member
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| /openbmc/u-boot/arch/m68k/include/asm/ |
| H A D | immap_5307.h | 100 u16 dcr; member
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| H A D | immap_5235.h | 91 u16 dcr; /* 0x00 Control register */ member
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| H A D | immap_5275.h | 110 u32 dcr; member
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| /openbmc/u-boot/include/faraday/ |
| H A D | ftsdc010.h | 23 unsigned int dcr; /* 0x1c - data control reg */ member
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| /openbmc/u-boot/arch/m68k/include/asm/coldfire/ |
| H A D | lcd.h | 26 u32 dcr; /* 0x30 DMA Control Register */ member
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| /openbmc/u-boot/drivers/ram/stm32mp1/ |
| H A D | stm32mp1_ddr.h | 121 u32 dcr; member
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| H A D | stm32mp1_ddr_regs.h | 153 u32 dcr; /* 0x30 DRAM Configuration*/ member
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| /openbmc/u-boot/drivers/spi/ |
| H A D | stm32_qspi.c | 24 u32 dcr; /* 0x04 */ member
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | dram_sun4i.h | 16 u32 dcr; /* 0x04 dram configuration register */ member
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| H A D | dram_sun9i.h | 105 u32 dcr; /* 0x88 DRAM configuration register */ member
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| H A D | dram_sun50i_h6.h | 176 u32 dcr; /* 0x100 */ member
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| H A D | dram_sun8i_a23.h | 180 u32 dcr; /* 0x44 */ member
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| H A D | dram_sun6i.h | 169 u32 dcr; /* 0x30 */ member
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | zynq_nand.c | 112 u32 dcr; /* 0x10 */ member
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| /openbmc/u-boot/include/synopsys/ |
| H A D | dwcddr21mctl.h | 16 unsigned int dcr; /* DRAM Configuration */ member
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