/openbmc/qemu/tests/tcg/s390x/ |
H A D | shift.c | 19 #define DEFINE_SHIFT_SINGLE_2(_insn, _offset) \ argument 22 #define DEFINE_SHIFT_SINGLE_3(_insn, _offset) \ argument 25 #define DEFINE_SHIFT_DOUBLE(_insn, _offset) \ argument
|
/openbmc/u-boot/include/fsl-mc/ |
H A D | fsl_mc_cmd.h | 80 #define MC_PREP_OP(_ext, _param, _offset, _width, _type, _arg) \ argument 83 #define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \ argument 86 #define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \ argument 89 #define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \ argument
|
/openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
H A D | clk-core.h | 174 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument 186 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument 197 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument 208 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ argument 218 #define HW_ONLY_GATE(_offset, _status_bit) \ argument 298 #define DIVIDER(_offset, _shift, _width) \ argument 308 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument 349 #define SELECTOR(_offset, _shift, _width) \ argument 382 #define TRIGGER(_offset, _bit) \ argument
|
/openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
H A D | clk-core.h | 174 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument 186 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument 197 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument 208 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ argument 218 #define HW_ONLY_GATE(_offset, _status_bit) \ argument 298 #define DIVIDER(_offset, _shift, _width) \ argument 308 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument 349 #define SELECTOR(_offset, _shift, _width) \ argument 382 #define TRIGGER(_offset, _bit) \ argument
|
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/ |
H A D | reset_manager.h | 25 #define RSTMGR_DEFINE(_bank, _offset) \ argument
|
H A D | reset_manager_s10.h | 60 #define RSTMGR_DEFINE(_bank, _offset) \ argument
|
/openbmc/u-boot/drivers/clk/renesas/ |
H A D | rcar-gen3-cpg.h | 28 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument 30 #define DEF_GEN3_RPC(_name, _id, _parent, _offset) \ argument
|
H A D | renesas-cpg-mssr.h | 74 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument 76 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
|
/openbmc/u-boot/drivers/usb/musb-new/ |
H A D | musb_regs.h | 268 #define MUSB_INDEXED_OFFSET(_epnum, _offset) \ argument 272 #define MUSB_FLAT_OFFSET(_epnum, _offset) \ argument 278 #define MUSB_TUSB_OFFSET(_epnum, _offset) \ argument 294 #define MUSB_BUSCTL_OFFSET(_epnum, _offset) \ argument 358 #define MUSB_INDEXED_OFFSET(_epnum, _offset) (_offset) argument 372 #define MUSB_BUSCTL_OFFSET(_epnum, _offset) (_offset) argument
|
/openbmc/openpower-hw-diags/attn/pel/ |
H A D | stream.hpp | 368 std::size_t _offset; member in attn::pel::Stream
|
/openbmc/phosphor-logging/extensions/openpower-pels/ |
H A D | stream.hpp | 367 std::size_t _offset; member in openpower::pels::Stream
|
/openbmc/phosphor-fan-presence/monitor/ |
H A D | tach_sensor.hpp | 478 const int64_t _offset; member in phosphor::fan::monitor::TachSensor
|
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/ |
H A D | xusb-padctl.c | 82 #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
|
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/ |
H A D | xusb-padctl.c | 62 #define TEGRA210_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
|