XCHAL_VECBASE_RESET_PADDR (definition) in projects: openbmc

Searched defs:XCHAL_VECBASE_RESET_PADDR (Results 1 – 12 of 12) sorted by relevance

/openbmc/qemu/target/xtensa/core-dsp3400/
H A D	core-isa.h	`369 #define XCHAL_VECBASE_RESET_PADDR 0x5FFE0400 macro`
/openbmc/qemu/target/xtensa/core-lx106/
H A D	core-isa.h	`393 #define XCHAL_VECBASE_RESET_PADDR 0x40000000 macro`
/openbmc/qemu/target/xtensa/core-dc232b/
H A D	core-isa.h	`334 #define XCHAL_VECBASE_RESET_PADDR 0x00000000 macro`
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A D	core.h	`333 #define XCHAL_VECBASE_RESET_PADDR 0x00000000 macro`
/openbmc/qemu/target/xtensa/core-dc233c/
H A D	core-isa.h	`384 #define XCHAL_VECBASE_RESET_PADDR 0x00002000 macro`
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A D	core.h	`363 #define XCHAL_VECBASE_RESET_PADDR 0x00002000 macro`
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A D	core-isa.h	`385 #define XCHAL_VECBASE_RESET_PADDR 0x00000000 macro`
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A D	core-isa.h	`467 #define XCHAL_VECBASE_RESET_PADDR 0x00002000 macro`
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A D	core.h	`467 #define XCHAL_VECBASE_RESET_PADDR 0x60000000 macro`
/openbmc/qemu/target/xtensa/core-de212/
H A D	core-isa.h	`503 #define XCHAL_VECBASE_RESET_PADDR 0x60000000 macro`
/openbmc/qemu/target/xtensa/core-sample_controller/
H A D	core-isa.h	`524 #define XCHAL_VECBASE_RESET_PADDR 0x40000000 macro`
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A D	core-isa.h	`606 #define XCHAL_VECBASE_RESET_PADDR 0x00002000 macro`