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Searched defs:XCHAL_TIMER1_INTERRUPT (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h258 #define XCHAL_TIMER1_INTERRUPT 11 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h260 #define XCHAL_TIMER1_INTERRUPT 11 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h268 #define XCHAL_TIMER1_INTERRUPT 8 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h323 #define XCHAL_TIMER1_INTERRUPT 11 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h342 #define XCHAL_TIMER1_INTERRUPT XTHAL_TIMER_UNCONFIGURED macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h276 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h277 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h275 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h324 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h303 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h325 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h328 #define XCHAL_TIMER1_INTERRUPT 8 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h350 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h411 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h392 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h392 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h389 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h393 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h425 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h446 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h515 #define XCHAL_TIMER1_INTERRUPT 10 /* CCOMPARE1 */ macro