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Searched defs:XCHAL_NUM_MISC_REGS (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
Dcore.h
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h58 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
Dcore.h
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h79 #define XCHAL_NUM_MISC_REGS 0 /* num of scratch regs (0..4) */ macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h80 #define XCHAL_NUM_MISC_REGS 0 /* num of scratch regs (0..4) */ macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h59 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
Dcore.h
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h58 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h79 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h58 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
Dcore.h
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h81 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
Dcore.h
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
Dcore.h
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
Dcore.h
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h81 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h60 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
Dcore.h
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h82 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h82 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h82 #define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs (0..4) */ macro