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Searched defs:XCHAL_ICACHE_ACCESS_SIZE (Results 1 – 10 of 10) sorted by relevance

/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h202 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h195 #define XCHAL_ICACHE_ACCESS_SIZE 1 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h205 #define XCHAL_ICACHE_ACCESS_SIZE 4 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h184 #define XCHAL_ICACHE_ACCESS_SIZE 4 macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h228 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h263 #define XCHAL_ICACHE_ACCESS_SIZE 8 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h241 #define XCHAL_ICACHE_ACCESS_SIZE 4 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h275 #define XCHAL_ICACHE_ACCESS_SIZE 4 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h293 #define XCHAL_ICACHE_ACCESS_SIZE 1 macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h375 #define XCHAL_ICACHE_ACCESS_SIZE 4 macro