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Searched defs:XCHAL_DCACHE_SETWIDTH (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h144 #define XCHAL_DCACHE_SETWIDTH 8 macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h146 #define XCHAL_DCACHE_SETWIDTH 8 macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h160 #define XCHAL_DCACHE_SETWIDTH 8 macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h151 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h150 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h149 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h182 #define XCHAL_DCACHE_SETWIDTH 0 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h189 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h193 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h192 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h171 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h215 #define XCHAL_DCACHE_SETWIDTH 8 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h215 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h251 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h250 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h250 #define XCHAL_DCACHE_SETWIDTH 6 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h250 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h228 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h262 #define XCHAL_DCACHE_SETWIDTH 7 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h280 #define XCHAL_DCACHE_SETWIDTH 0 macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h358 #define XCHAL_DCACHE_SETWIDTH 7 macro