/openbmc/linux/arch/xtensa/variants/fsf/include/variant/ |
H A D | core.h | 115 #define XCHAL_DCACHE_LINESIZE 16 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-fsf/ |
H A D | core-isa.h | 117 #define XCHAL_DCACHE_LINESIZE 16 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/ |
H A D | core.h | 130 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-dsp3400/ |
H A D | core-isa.h | 157 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-lx106/ |
H A D | core-isa.h | 150 #define XCHAL_DCACHE_LINESIZE 4 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-dc232b/ |
H A D | core-isa.h | 121 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/ |
H A D | core.h | 122 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/ |
H A D | core.h | 120 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-dc233c/ |
H A D | core-isa.h | 160 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/ |
H A D | core.h | 139 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/ |
H A D | core.h | 161 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/ |
H A D | core-isa.h | 181 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
H A D | core.h | 181 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/de212/include/variant/ |
H A D | core.h | 209 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/csp/include/variant/ |
H A D | core.h | 209 #define XCHAL_DCACHE_LINESIZE 64 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-test_kc705_be/ |
H A D | core-isa.h | 209 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/ |
H A D | core.h | 187 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/ |
H A D | core.h | 210 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-de212/ |
H A D | core-isa.h | 218 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-sample_controller/ |
H A D | core-isa.h | 232 #define XCHAL_DCACHE_LINESIZE 4 /* D-cache line size in bytes */ macro
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/openbmc/qemu/target/xtensa/core-de233_fpu/ |
H A D | core-isa.h | 281 #define XCHAL_DCACHE_LINESIZE 32 /* D-cache line size in bytes */ macro
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