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Searched defs:UCR1_RRDYEN (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/include/hw/char/
H A Dimx_serial.h68 #define UCR1_RRDYEN (1<<9) /* Rx Ready Interrupt Enable */ macro
/openbmc/u-boot/drivers/serial/
H A Dserial_mxc.c28 #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h531 #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ macro
/openbmc/linux/drivers/tty/serial/
H A Dimx.c70 #define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */ macro