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Searched defs:OP (Results 1 – 25 of 27) sorted by relevance

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/openbmc/qemu/target/arm/tcg/
H A Dmve_helper.c151 #define DO_VLDR(OP, MFLAG, MSIZE, MTYPE, LDTYPE, ESIZE, TYPE) \ argument
175 #define DO_VSTR(OP, MFLAG, MSIZE, STTYPE, ESIZE, TYPE) \ argument
221 #define DO_VLDR_SG(OP, MFLAG, MTYPE, LDTYPE, ESIZE, TYPE, OFFTYPE, ADDRFN, WB)\ argument
248 #define DO_VSTR_SG(OP, MFLAG, STTYPE, ESIZE, TYPE, ADDRFN, WB) \ argument
283 #define DO_VLDR64_SG(OP, ADDRFN, WB) \ argument
309 #define DO_VSTR64_SG(OP, ADDRFN, WB) \ argument
398 #define DO_VLD4B(OP, O1, O2, O3, O4) \ in DO_VLDR64_SG() argument
422 #define DO_VLD4H(OP, O1, O2) \ argument
449 #define DO_VLD4W(OP, O1, O2, O3, O4) \ argument
489 #define DO_VLD2B(OP, O1, O2, O3, O4) \ argument
[all …]
H A Dsve_helper.c178 #define DO_ZPZZ(NAME, TYPE, H, OP) \ in LOGICAL_PPPP() argument
196 #define DO_ZPZZ_D(NAME, TYPE, OP) \ argument
663 #define DO_ZPZZ_PAIR(NAME, TYPE, H, OP) \ in DO_ZPZZ() argument
687 #define DO_ZPZZ_PAIR_D(NAME, TYPE, OP) \ argument
733 #define DO_ZPZZ_PAIR_FP(NAME, TYPE, H, OP) \ argument
783 #define DO_ZPZW(NAME, TYPE, TYPEW, H, OP) \ argument
816 #define DO_ZPZ(NAME, TYPE, H, OP) \ argument
833 #define DO_ZPZ_D(NAME, TYPE, OP) \ argument
998 #define DO_ZZW(NAME, TYPE, TYPEW, H, OP) \ argument
1042 #define DO_ZZZ_TB(NAME, TYPEW, TYPEN, HW, HN, OP) \ argument
[all …]
H A Dtranslate-neon.c1554 #define DO_PREWIDEN(INSN, S, OP, SRC1WIDE, SIGN) \ argument
1638 #define DO_NARROW_3D(INSN, OP, NARROWTYPE, EXTOP) \ argument
3166 #define DO_VEC_RMODE(INSN, RMODE, OP) \ argument
H A Dsme_helper.c1688 #define DO_MLALL(NAME, TYPEW, TYPEN, TYPEM, HW, HN, OP) \ argument
1715 #define DO_MLALL_IDX(NAME, TYPEW, TYPEN, TYPEM, HW, HN, OP) \ argument
H A Dvec_helper.c1743 #define DO_MLA_IDX(NAME, TYPE, OP, H) \ argument
1849 #define DO_SAT(NAME, WTYPE, TYPEN, TYPEM, OP, MIN, MAX) \ argument
2555 #define DO_CMP0(NAME, TYPE, OP) \ argument
H A Dtranslate-mve.c203 #define DO_VLDST_WIDE_NARROW(OP, SLD, ULD, ST, MSIZE) \ argument
H A Dtranslate.c3823 #define DO_ANY3(NAME, OP, L, K) \ argument
3831 #define DO_ANY2(NAME, OP, L, K) \ argument
3839 #define DO_CMP2(NAME, OP, L) \ argument
/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-muldiv.h2 void glue(glue(test_, OP), b)(long op0, long op1) in glue() argument
20 void glue(glue(test_, OP), w)(long op0h, long op0, long op1) in glue() argument
38 void glue(glue(test_, OP), l)(long op0h, long op0, long op1) in glue() argument
57 void glue(glue(test_, OP), q)(long op0h, long op0, long op1) in glue() argument
H A Dtest-i386.c82 #define OP add macro
85 #define OP sub macro
88 #define OP xor macro
91 #define OP and macro
94 #define OP or macro
97 #define OP cmp macro
100 #define OP adc macro
104 #define OP sbb macro
108 #define OP inc macro
113 #define OP dec macro
[all …]
H A Dtest-i386.h120 void glue(test_, OP)(void) in glue() argument
H A Dtest-i386-shift.h165 void glue(test_, OP)(void) in glue() argument
/openbmc/qemu/tests/tcg/hexagon/
H A Dhvx_misc.h97 #define TEST_VEC_OP1(NAME, ASM, EL, FIELD, FIELDSZ, OP) \ argument
115 #define TEST_VEC_OP2(NAME, ASM, EL, FIELD, FIELDSZ, OP) \ argument
151 #define TEST_PRED_OP2(NAME, ASM, OP, INV) \ argument
/openbmc/qemu/target/riscv/
H A Dvector_internals.h143 #define OPIVV1(NAME, TD, T2, TX2, HD, HS2, OP) \ argument
182 #define OPIVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
210 #define OPIVX2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
H A Dvector_helper.c1342 #define GEN_VEXT_SHIFT_VV(NAME, TS1, TS2, HS1, HS2, OP, MASK) \ argument
1389 #define GEN_VEXT_SHIFT_VX(NAME, TD, TS2, HD, HS2, OP, MASK) \ argument
1940 #define OPIVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
1986 #define OPIVX3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
2191 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
2319 #define OPIVX2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
3111 #define OPFVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
3157 #define OPFVF2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
3392 #define OPFVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ in RVVCALL() argument
3424 #define OPFVF3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ in RVVCALL() argument
[all …]
/openbmc/qemu/audio/
H A Dmixeng.c494 #define OP(a, b) a += b macro
498 #define OP(a, b) a = b macro
/openbmc/qemu/target/s390x/tcg/
H A Dvec_fpu_helper.c242 #define DEF_GVEC_VOP2(NAME, OP) \ argument
320 #define DEF_GVEC_VOP3_B(NAME, OP, BITS) \ argument
329 #define DEF_GVEC_VOP3(NAME, OP) \ argument
500 #define DEF_GVEC_VFC_B(NAME, OP, BITS) \ argument
521 #define DEF_GVEC_VFC(NAME, OP) \ argument
H A Dtranslate.c5938 #define C(OPC, NM, FT, FC, I1, I2, P, W, OP, CC) \ argument
5941 #define D(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D) \ argument
5944 #define F(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, FL) \ argument
5947 #define E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, FL) insn_ ## NM, argument
5954 #define E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, FL) { \ argument
6034 #define E(OPC, NM, FT, FC, I1, I2, P, W, OP, CC, D, FL) \ argument
/openbmc/qemu/disas/
H A Dalpha.c574 #define OP(x) (((x) & 0x3F) << 26) macro
H A Dsparc.c187 #define OP(x) ((unsigned) ((x) & 0x3) << 30) /* Op field of all insns. */ macro
/openbmc/qemu/accel/tcg/
H A Dtcg-runtime-gvec.c1017 #define DO_CMP1(NAME, TYPE, OP) \ argument
1044 #define DO_CMP1(NAME, TYPE, OP) \ argument
/openbmc/qemu/tcg/
H A Dtcg-op-ldst.c1204 #define GEN_ATOMIC_HELPER(NAME, OP, NEW) \ argument
/openbmc/qemu/target/hexagon/mmvec/
H A Dmacros.h118 #define fSCATTER_FINISH(OP) argument
/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c63 #define CASE_MODRM_MEM_OP(OP) \ argument
68 #define CASE_MODRM_OP(OP) \ argument
/openbmc/qemu/target/hexagon/
H A Dgen_tcg_hvx.h453 #define fGEN_TCG_VEC_CMP_OP(COND, TYPE, SIZE, OP) \ argument
/openbmc/qemu/target/mips/tcg/
H A Dmsa_helper.c6471 #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \ argument
7075 #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \ argument
7330 #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \ argument
7383 #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \ argument
7434 #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \ argument
7690 #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \ argument

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