Home
last modified time | relevance | path

Searched defs:CONFIG_SYS_DDR_TIMING_3_800 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c36 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
/openbmc/u-boot/include/configs/
H A DBSC9131RDB.h101 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
H A DBSC9132QDS.h143 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
H A DP1010RDB.h242 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro