1menu "ARC architecture" 2 depends on ARC 3 4config SYS_ARCH 5 default "arc" 6 7config SYS_CPU 8 default "arcv1" if ISA_ARCOMPACT 9 default "arcv2" if ISA_ARCV2 10 11choice 12 prompt "ARC Instruction Set" 13 default ISA_ARCOMPACT 14 15config ISA_ARCOMPACT 16 bool "ARCompact ISA" 17 help 18 The original ARC ISA of ARC600/700 cores 19 20config ISA_ARCV2 21 bool "ARC ISA v2" 22 help 23 ISA for the Next Generation ARC-HS cores 24 25endchoice 26 27choice 28 prompt "CPU selection" 29 default CPU_ARC770D if ISA_ARCOMPACT 30 default CPU_ARCHS38 if ISA_ARCV2 31 32config CPU_ARC750D 33 bool "ARC 750D" 34 depends on ISA_ARCOMPACT 35 select ARC_MMU_V2 36 help 37 Choose this option to build an U-Boot for ARC750D CPU. 38 39config CPU_ARC770D 40 bool "ARC 770D" 41 depends on ISA_ARCOMPACT 42 select ARC_MMU_V3 43 help 44 Choose this option to build an U-Boot for ARC770D CPU. 45 46config CPU_ARCEM6 47 bool "ARC EM6" 48 depends on ISA_ARCV2 49 select ARC_MMU_ABSENT 50 help 51 Next Generation ARC Core based on ISA-v2 ISA without MMU. 52 53config CPU_ARCHS36 54 bool "ARC HS36" 55 depends on ISA_ARCV2 56 select ARC_MMU_ABSENT 57 help 58 Next Generation ARC Core based on ISA-v2 ISA without MMU. 59 60config CPU_ARCHS38 61 bool "ARC HS38" 62 depends on ISA_ARCV2 63 select ARC_MMU_V4 64 help 65 Next Generation ARC Core based on ISA-v2 ISA with MMU. 66 67endchoice 68 69choice 70 prompt "MMU Version" 71 default ARC_MMU_V3 if CPU_ARC770D 72 default ARC_MMU_V2 if CPU_ARC750D 73 default ARC_MMU_ABSENT if CPU_ARCEM6 74 default ARC_MMU_ABSENT if CPU_ARCHS36 75 default ARC_MMU_V4 if CPU_ARCHS38 76 77config ARC_MMU_ABSENT 78 bool "No MMU" 79 help 80 No MMU 81 82config ARC_MMU_V2 83 bool "MMU v2" 84 depends on CPU_ARC750D 85 help 86 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio 87 when 2 D-TLB and 1 I-TLB entries index into same 2way set. 88 89config ARC_MMU_V3 90 bool "MMU v3" 91 depends on CPU_ARC770D 92 help 93 Introduced with ARC700 4.10: New Features 94 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) 95 Shared Address Spaces (SASID) 96 97config ARC_MMU_V4 98 bool "MMU v4" 99 depends on CPU_ARCHS38 100 help 101 Introduced as a part of ARC HS38 release. 102 103endchoice 104 105config CPU_BIG_ENDIAN 106 bool "Enable Big Endian Mode" 107 default n 108 help 109 Build kernel for Big Endian Mode of ARC CPU 110 111config SYS_ICACHE_OFF 112 bool "Do not enable icache" 113 default n 114 help 115 Do not enable instruction cache in U-Boot 116 117config SYS_DCACHE_OFF 118 bool "Do not enable dcache" 119 default n 120 help 121 Do not enable data cache in U-Boot 122 123menuconfig ARC_DBG 124 bool "ARC debugging" 125 default n 126 127if ARC_DBG 128 129config ARC_DBG_IOC_ENABLE 130 bool "Enable IO coherency unit" 131 depends on CPU_ARCHS38 132 default n 133 help 134 Enable IO coherency unit to debug problems with caches and 135 DMA peripherals. 136 NOTE: as of today linux will not work properly if this option 137 is enabled in u-boot! 138 139endif 140 141choice 142 prompt "Target select" 143 default TARGET_AXS103 144 145config TARGET_TB100 146 bool "Support tb100" 147 148config TARGET_NSIM 149 bool "Support standalone nSIM & Free nSIM" 150 151config TARGET_AXS101 152 bool "Support Synopsys Designware SDP board AXS101" 153 select BOUNCE_BUFFER if CMD_NAND 154 155config TARGET_AXS103 156 bool "Support Synopsys Designware SDP board AXS103" 157 select BOUNCE_BUFFER if CMD_NAND 158 159config TARGET_EMSDP 160 bool "Synopsys EM Software Development Platform" 161 select CPU_ARCEM6 162 163config TARGET_HSDK 164 bool "Support Synpsys HS DevelopmentKit board" 165 166config TARGET_IOT_DEVKIT 167 bool "Synopsys Brite IoT Development kit" 168 select CPU_ARCEM6 169 170endchoice 171 172source "board/abilis/tb100/Kconfig" 173source "board/synopsys/Kconfig" 174source "board/synopsys/axs10x/Kconfig" 175source "board/synopsys/emsdp/Kconfig" 176source "board/synopsys/hsdk/Kconfig" 177source "board/synopsys/iot_devkit/Kconfig" 178 179endmenu 180