/openbmc/u-boot/drivers/video/exynos/ |
H A D | exynos_dp_lowlevel.c | 22 unsigned int reg; in exynos_dp_enable_video_input() local 39 unsigned int reg; in exynos_dp_enable_video_bist() local 55 unsigned int reg; in exynos_dp_enable_video_mute() local 70 unsigned int reg; in exynos_dp_init_analog_param() local 173 unsigned int reg; in exynos_dp_enable_sw_func() local 189 unsigned int reg; in exynos_dp_set_analog_power_down() local 242 unsigned int reg; in exynos_dp_get_pll_lock_status() local 255 unsigned int reg; in exynos_dp_set_pll_power() local 270 unsigned int reg; in exynos_dp_init_analog_func() local 319 unsigned int reg; in exynos_dp_init_hpd() local [all …]
|
H A D | exynos_mipi_dsi_lowlevel.c | 20 unsigned int reg; in exynos_mipi_dsi_func_reset() local 34 unsigned int reg = 0; in exynos_mipi_dsi_sw_reset() local 51 unsigned int reg = readl(&mipi_dsim->intsrc); in exynos_mipi_dsi_sw_release() local 63 unsigned int reg = readl(&mipi_dsim->intmsk); in exynos_mipi_dsi_set_interrupt_mask() local 76 unsigned int reg; in exynos_mipi_dsi_init_fifo_pointer() local 104 unsigned int reg; in exynos_mipi_dsi_set_main_disp_resol() local 123 unsigned int reg; in exynos_mipi_dsi_set_main_disp_vporch() local 141 unsigned int reg; in exynos_mipi_dsi_set_main_disp_hporch() local 156 unsigned int reg; in exynos_mipi_dsi_set_main_disp_sync_area() local 172 unsigned int reg; in exynos_mipi_dsi_set_sub_disp_resol() local [all …]
|
/openbmc/qemu/include/hw/ |
H A D | registerfields.h | 21 #define REG32(reg, addr) \ argument 25 #define REG8(reg, addr) \ argument 29 #define REG16(reg, addr) \ argument 33 #define REG64(reg, addr) \ argument 42 #define FIELD(reg, field, shift, length) \ argument 49 #define FIELD_EX8(storage, reg, field) \ argument 52 #define FIELD_EX16(storage, reg, field) \ argument 55 #define FIELD_EX32(storage, reg, field) \ argument 58 #define FIELD_EX64(storage, reg, field) \ argument 62 #define FIELD_SEX8(storage, reg, field) \ argument [all …]
|
/openbmc/u-boot/arch/x86/cpu/quark/ |
H A D | msg_port.c | 11 void msg_port_setup(int op, int port, int reg) in msg_port_setup() 18 u32 msg_port_read(u8 port, u32 reg) in msg_port_read() 30 void msg_port_write(u8 port, u32 reg, u32 value) in msg_port_write() 38 u32 msg_port_alt_read(u8 port, u32 reg) in msg_port_alt_read() 50 void msg_port_alt_write(u8 port, u32 reg, u32 value) in msg_port_alt_write() 58 u32 msg_port_io_read(u8 port, u32 reg) in msg_port_io_read() 70 void msg_port_io_write(u8 port, u32 reg, u32 value) in msg_port_io_write()
|
/openbmc/u-boot/arch/x86/include/asm/arch-quark/ |
H A D | msg_port.h | 108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument 113 #define msg_port_clrbits(port, reg, clr) \ argument 115 #define msg_port_setbits(port, reg, set) \ argument 117 #define msg_port_clrsetbits(port, reg, clr, set) \ argument 120 #define msg_port_alt_clrbits(port, reg, clr) \ argument 122 #define msg_port_alt_setbits(port, reg, set) \ argument 124 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument 127 #define msg_port_io_clrbits(port, reg, clr) \ argument 129 #define msg_port_io_setbits(port, reg, set) \ argument 131 #define msg_port_io_clrsetbits(port, reg, clr, set) \ argument
|
/openbmc/qemu/tests/qtest/ |
H A D | qtest_aspeed.c | 19 uint8_t slave_addr, uint8_t reg) in aspeed_i2c_startup() 44 uint8_t reg, size_t nbytes) in aspeed_i2c_read_n() 64 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg) in aspeed_i2c_readl() 70 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg) in aspeed_i2c_readw() 76 uint32_t baseaddr, uint8_t slave_addr, uint8_t reg) in aspeed_i2c_readb() 83 uint8_t reg, uint32_t v, size_t nbytes) in aspeed_i2c_write_n() 100 uint8_t reg, uint32_t v) in aspeed_i2c_writel() 107 uint8_t reg, uint16_t v) in aspeed_i2c_writew() 114 uint8_t reg, uint8_t v) in aspeed_i2c_writeb()
|
/openbmc/u-boot/arch/riscv/lib/ |
H A D | setjmp.S | 10 #define STORE_IDX(reg, idx) sd reg, (idx*8)(a0) argument 11 #define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0) argument 13 #define STORE_IDX(reg, idx) sw reg, (idx*4)(a0) argument 14 #define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0) argument
|
H A D | crt0_riscv_efi.S | 15 #define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp) argument 16 #define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp) argument 20 #define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp) argument 21 #define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp) argument
|
/openbmc/u-boot/arch/arm/mach-socfpga/ |
H A D | clock_manager_gen5.c | 320 u32 reg, clock; in cm_get_main_vco_clk_hz() local 335 u32 reg, clock = 0; in cm_get_per_vco_clk_hz() local 360 u32 reg, clock; in cm_get_mpu_clk_hz() local 374 u32 reg, clock = 0; in cm_get_sdram_clk_hz() local 405 u32 reg, clock = 0; in cm_get_l4_sp_clk_hz() local 439 u32 reg, clock = 0; in cm_get_mmc_controller_clk_hz() local 469 u32 reg, clock = 0; in cm_get_qspi_controller_clk_hz() local 497 u32 reg, clock = 0; in cm_get_spi_controller_clk_hz() local
|
/openbmc/u-boot/arch/arm/mach-imx/mx6/ |
H A D | clock.c | 29 u32 reg; in enable_ocotp_clk() local 83 u32 reg; in enable_usboh3_clk() local 156 u32 reg; in enable_i2c_clk() local 196 u32 reg; in enable_spi_clk() local 310 u32 reg, freq; in get_mcu_main_clk() local 322 u32 reg, div = 0, freq = 0; in get_periph_clk() local 372 u32 reg, ipg_podf; in get_ipg_clk() local 383 u32 reg, perclk_podf; in get_ipg_per_clk() local 399 u32 reg, uart_podf; in get_uart_clk() local 417 u32 reg, cspi_podf; in get_cspi_clk() local [all …]
|
/openbmc/qemu/hw/misc/ |
H A D | xlnx-versal-crl.c | 35 static void crl_status_postw(RegisterInfo *reg, uint64_t val64) in crl_status_postw() 41 static uint64_t crl_enable_prew(RegisterInfo *reg, uint64_t val64) in crl_enable_prew() 51 static uint64_t crl_disable_prew(RegisterInfo *reg, uint64_t val64) in crl_disable_prew() 77 #define REGFIELD_RESET(type, s, reg, f, new_val, dev) { \ argument 87 static uint64_t crl_rst_r5_prew(RegisterInfo *reg, uint64_t val64) in crl_rst_r5_prew() 96 static uint64_t crl_rst_adma_prew(RegisterInfo *reg, uint64_t val64) in crl_rst_adma_prew() 108 static uint64_t crl_rst_uart0_prew(RegisterInfo *reg, uint64_t val64) in crl_rst_uart0_prew() 116 static uint64_t crl_rst_uart1_prew(RegisterInfo *reg, uint64_t val64) in crl_rst_uart1_prew() 124 static uint64_t crl_rst_gem0_prew(RegisterInfo *reg, uint64_t val64) in crl_rst_gem0_prew() 132 static uint64_t crl_rst_gem1_prew(RegisterInfo *reg, uint64_t val64) in crl_rst_gem1_prew() [all …]
|
H A D | xlnx-versal-pmc-iou-slcr.c | 767 static void parity_isr_postw(RegisterInfo *reg, uint64_t val64) in parity_isr_postw() 773 static uint64_t parity_ier_prew(RegisterInfo *reg, uint64_t val64) in parity_ier_prew() 783 static uint64_t parity_idr_prew(RegisterInfo *reg, uint64_t val64) in parity_idr_prew() 793 static uint64_t parity_itr_prew(RegisterInfo *reg, uint64_t val64) in parity_itr_prew() 809 static void isr_postw(RegisterInfo *reg, uint64_t val64) in isr_postw() 815 static uint64_t ier_prew(RegisterInfo *reg, uint64_t val64) in ier_prew() 825 static uint64_t idr_prew(RegisterInfo *reg, uint64_t val64) in idr_prew() 835 static uint64_t itr_prew(RegisterInfo *reg, uint64_t val64) in itr_prew() 845 static uint64_t sd0_ctrl_reg_prew(RegisterInfo *reg, uint64_t val64) in sd0_ctrl_reg_prew() 857 static uint64_t sd1_ctrl_reg_prew(RegisterInfo *reg, uint64_t val64) in sd1_ctrl_reg_prew() [all …]
|
/openbmc/u-boot/drivers/misc/ |
H A D | smsc_sio1007.c | 11 static inline u8 sio1007_read(int port, int reg) in sio1007_read() 18 static inline void sio1007_write(int port, int reg, int val) in sio1007_write() 24 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits() 69 int reg = GPIO0_DIR; in sio1007_gpio_config() local 92 int reg = GPIO0_DATA; in sio1007_gpio_get_value() local 111 int reg = GPIO0_DATA; in sio1007_gpio_set_value() local
|
/openbmc/u-boot/arch/arm/mach-imx/mx7ulp/ |
H A D | pcc.c | 83 u32 reg, val; in pcc_clock_enable() local 113 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local 162 u32 reg, val; in pcc_clock_div_config() local 198 u32 reg, val; in pcc_clock_is_enable() local 214 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local 255 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
|
/openbmc/u-boot/board/freescale/t208xrdb/ |
H A D | cpld.c | 12 u8 cpld_read(unsigned int reg) in cpld_read() 19 void cpld_write(unsigned int reg, u8 value) in cpld_write() 29 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local 39 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
|
/openbmc/qemu/target/arm/ |
H A D | gdbstub.c | 122 static int vfp_gdb_get_reg(CPUState *cs, GByteArray *buf, int reg) in vfp_gdb_get_reg() 147 static int vfp_gdb_set_reg(CPUState *cs, uint8_t *buf, int reg) in vfp_gdb_set_reg() 174 static int vfp_gdb_get_sysreg(CPUState *cs, GByteArray *buf, int reg) in vfp_gdb_get_sysreg() 188 static int vfp_gdb_set_sysreg(CPUState *cs, uint8_t *buf, int reg) in vfp_gdb_set_sysreg() 204 static int mve_gdb_get_reg(CPUState *cs, GByteArray *buf, int reg) in mve_gdb_get_reg() 217 static int mve_gdb_set_reg(CPUState *cs, uint8_t *buf, int reg) in mve_gdb_set_reg() 240 static int arm_gdb_get_sysreg(CPUState *cs, GByteArray *buf, int reg) in arm_gdb_get_sysreg() 259 static int arm_gdb_set_sysreg(CPUState *cs, uint8_t *buf, int reg) in arm_gdb_set_sysreg() 352 static uint32_t *m_sysreg_ptr(CPUARMState *env, MProfileSysreg reg, bool sec) in m_sysreg_ptr() 388 MProfileSysreg reg, bool secure) in m_sysreg_get() [all …]
|
/openbmc/u-boot/board/freescale/ls1043ardb/ |
H A D | cpld.c | 13 u8 cpld_read(unsigned int reg) in cpld_read() 20 void cpld_write(unsigned int reg, u8 value) in cpld_write() 30 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_altbank() local 52 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_defbank() local 71 u16 reg = CPLD_CFG_RCW_SRC_NAND; in cpld_set_nand() local 87 u16 reg = CPLD_CFG_RCW_SRC_SD; in cpld_set_sd() local
|
/openbmc/u-boot/arch/arm/mach-tegra/ |
H A D | pinmux-common.c | 144 u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); in pinmux_set_tristate_input_clamping() local 151 u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); in pinmux_clear_tristate_input_clamping() local 159 u32 *reg = MUX_REG(pin); in pinmux_set_func() local 191 u32 *reg = PULL_REG(pin); in pinmux_set_pullupdown() local 206 u32 *reg = TRI_REG(pin); in pinmux_set_tristate() local 234 u32 *reg = REG(pin); in pinmux_set_io() local 256 u32 *reg = REG(pin); in pinmux_set_lock() local 283 u32 *reg = REG(pin); in pinmux_set_od() local 308 u32 *reg = REG(pin); in pinmux_set_ioreset() local 333 u32 *reg = REG(pin); in pinmux_set_rcv_sel() local [all …]
|
/openbmc/qemu/tests/qtest/libqos/ |
H A D | i2c.c | 23 void i2c_read_block(QI2CDevice *i2cdev, uint8_t reg, in i2c_read_block() 30 void i2c_write_block(QI2CDevice *i2cdev, uint8_t reg, in i2c_write_block() 40 uint8_t i2c_get8(QI2CDevice *i2cdev, uint8_t reg) in i2c_get8() 47 uint16_t i2c_get16(QI2CDevice *i2cdev, uint8_t reg) in i2c_get16() 54 void i2c_set8(QI2CDevice *i2cdev, uint8_t reg, uint8_t value) in i2c_set8() 59 void i2c_set16(QI2CDevice *i2cdev, uint8_t reg, uint16_t value) in i2c_set16()
|
H A D | sdhci.c | 28 bool sdma, uint64_t reg) in set_qsdhci_fields() 38 static uint16_t sdhci_mm_readw(QSDHCI *s, uint32_t reg) in sdhci_mm_readw() 44 static uint64_t sdhci_mm_readq(QSDHCI *s, uint32_t reg) in sdhci_mm_readq() 50 static void sdhci_mm_writeq(QSDHCI *s, uint32_t reg, uint64_t val) in sdhci_mm_writeq() 80 static uint16_t sdhci_pci_readw(QSDHCI *s, uint32_t reg) in sdhci_pci_readw() 86 static uint64_t sdhci_pci_readq(QSDHCI *s, uint32_t reg) in sdhci_pci_readq() 92 static void sdhci_pci_writeq(QSDHCI *s, uint32_t reg, uint64_t val) in sdhci_pci_writeq()
|
/openbmc/u-boot/board/freescale/t102xrdb/ |
H A D | cpld.c | 15 u8 cpld_read(unsigned int reg) in cpld_read() 22 void cpld_write(unsigned int reg, u8 value) in cpld_write() 34 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local 47 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
|
/openbmc/u-boot/board/freescale/t104xrdb/ |
H A D | cpld.c | 19 u8 cpld_read(unsigned int reg) in cpld_read() 26 void cpld_write(unsigned int reg, u8 value) in cpld_write() 38 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_altbank() local 51 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_defbank() local
|
/openbmc/u-boot/board/micronas/vct/ |
H A D | top.c | 13 u32 reg; member 28 TOP_PINMUX_t reg; in top_read_pin() local 67 static void top_write_pin(int pin, TOP_PINMUX_t reg) in top_write_pin() 101 TOP_PINMUX_t reg; in top_set_pin() local 124 TOP_PINMUX_t reg; in top_set_pin() local
|
/openbmc/u-boot/drivers/rtc/ |
H A D | rtc-uclass.c | 42 int rtc_read8(struct udevice *dev, unsigned int reg) in rtc_read8() 52 int rtc_write8(struct udevice *dev, unsigned int reg, int val) in rtc_write8() 62 int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep) in rtc_read16() 79 int rtc_write16(struct udevice *dev, unsigned int reg, u16 value) in rtc_write16() 92 int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep) in rtc_read32() 109 int rtc_write32(struct udevice *dev, unsigned int reg, u32 value) in rtc_write32()
|
/openbmc/qemu/hw/xen/ |
H A D | xen_pt_config_init.c | 84 XenPTRegInfo *reg = NULL; in xen_pt_find_reg() local 102 XenPTRegInfo *reg, uint32_t valid_mask) in get_throughable_mask() 120 XenPTRegInfo *reg, uint32_t real_offset, in xen_pt_common_reg_init() 132 XenPTRegInfo *reg = cfg_entry->reg; in xen_pt_byte_reg_read() local 145 XenPTRegInfo *reg = cfg_entry->reg; in xen_pt_word_reg_read() local 158 XenPTRegInfo *reg = cfg_entry->reg; in xen_pt_long_reg_read() local 175 XenPTRegInfo *reg = cfg_entry->reg; in xen_pt_byte_reg_write() local 194 XenPTRegInfo *reg = cfg_entry->reg; in xen_pt_word_reg_write() local 213 XenPTRegInfo *reg = cfg_entry->reg; in xen_pt_long_reg_write() local 242 XenPTRegInfo *reg, uint32_t real_offset, in xen_pt_vendor_reg_init() [all …]
|