Lines Matching +full:0 +full:x07
12 #define QIXIS_XMAP_MASK 0x07
14 #define QIXIS_RST_CTL_RESET_EN 0x30
15 #define QIXIS_LBMAP_DFLTBANK 0x00
16 #define QIXIS_LBMAP_ALTBANK 0x20
17 #define QIXIS_LBMAP_QSPI 0x00
18 #define QIXIS_RCW_SRC_QSPI 0xff
19 #define QIXIS_RST_CTL_RESET 0x31
20 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
21 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
22 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
23 #define QIXIS_LBMAP_MASK 0x0f
25 #define QIXIS_RCW_SRC_SD 0x08
27 #define QIXIS_SDID_MASK 0x07
28 #define QIXIS_ESDHC_NO_ADAPTER 0x7
31 #define QIXIS_SYSCLK_100 0x0
32 #define QIXIS_SYSCLK_125 0x1
33 #define QIXIS_SYSCLK_133 0x2
36 #define QIXIS_DDRCLK_100 0x0
37 #define QIXIS_DDRCLK_125 0x1
38 #define QIXIS_DDRCLK_133 0x2
40 #define BRDCFG4_EMI1SEL_MASK 0xF8
42 #define BRDCFG4_EMI2SEL_MASK 0x07
43 #define BRDCFG4_EMI2SEL_SHIFT 0
47 #define I2C_MUX_CH_VOL_MONITOR 0xA
49 #define I2C_VOL_MONITOR_ADDR 0x63
50 #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
51 #define I2C_VOL_MONITOR_BUS_V_OVF 0x1
61 #define PMBUS_CMD_PAGE 0x0
62 #define PMBUS_CMD_READ_VOUT 0x8B
63 #define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
64 #define PMBUS_CMD_VOUT_COMMAND 0x21
65 #define PWM_CHANNEL0 0x0
71 #define CONFIG_SYS_RTC_BUS_NUM 0
72 #define I2C_MUX_CH_RTC 0xB
89 #define AQ_PHY_ADDR1 0x00
90 #define AQ_PHY_ADDR2 0x01
91 #define AQ_PHY_ADDR3 0x02
92 #define AQ_PHY_ADDR4 0x03
95 #define CORTINA_PHY_ADDR1 0x0
97 #define INPHI_PHY_ADDR1 0x0
98 #define INPHI_PHY_ADDR2 0x1
100 #define RGMII_PHY_ADDR1 0x01
101 #define RGMII_PHY_ADDR2 0x02
103 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
104 #define SGMII_CARD_PORT2_PHY_ADDR 0x1D
105 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
106 #define SGMII_CARD_PORT4_PHY_ADDR 0x1F
113 #define CONFIG_SYS_EEPROM_BUS_NUM 0
114 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
122 "lx2160aqds_vdd_mv=800\0" \
123 "BOARD=lx2160aqds\0" \
125 "sf probe 0:0 && sf read $load_addr " \
129 " bootm $load_addr#$BOARD\0" \
136 "bootm $load_addr#$BOARD\0"