Lines Matching +full:phy +full:- +full:cadence

1 source "drivers/net/phy/Kconfig"
11 	  This is currently implemented in net/eth-uclass.c
27 	bool "Enable GbE PHY status parsing and configuration"
43 	bool "Altera Triple-Speed Ethernet MAC support"
47 	  This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
48 	  Please find details on the "Triple-Speed Ethernet MegaCore Function
134 	  U-Boot.
152 	  in U-Boot to the RAW AF_PACKET API in Linux. This allows real
163 	  provide the PHY (physical media interface).
172 	  Altera system manager to correctly interface with the PHY.
217 	  and integrates a link list DMA engine with direct M-Bus
225 	  offers high-priority transmit queue for QoS and CoS
254 	bool "Cadence MACB/GEM Ethernet Interface"
258 	  The Cadence MACB ethernet interface is found on many Atmel
259 	  AT91 and SAMA5 parts.  This driver also supports the Cadence
264 	bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq"
267 	  The Cadence MACB ethernet interface was used on Zynq platform.
288 	  Enable the support of the Reduced Gigabit Media-Independent
294 	  Enable support of the Media-Independent Interface (MII)
324 	bool "Enable 32-bit interface"
327 	bool "Enable 16-bit interface"
446 	int "FEC1 PHY"
448 	default -1
450 	  Define to the hardcoded PHY address which corresponds
453 	  means that the PHY with address 4 is connected to FEC1
455 	  When set to -1, means to probe for first available.
462 	  The PHY does not have a RXERR line (RMII only).
471 	int "FEC2 PHY"
473 	default -1
475 	  Define to the hardcoded PHY address which corresponds
478 	  means that the PHY with address 4 is connected to FEC1
480 	  When set to -1, means to probe for first available.
487 	  The PHY does not have a RXERR line (RMII only).
516 	bool "Enable Three-Speed Ethernet Controller"
518 	  This driver implements support for the (Enhanced) Three-Speed