device-tree-bindings/spi/spi-stm32-qspi.txt

2 --------------------------------------------
5 - compatible		: should be "st,stm32-qspi".
6 - reg			: 1. Physical base address and size of SPI registers map.
7 			  2. Physical base address & size of mapped NOR Flash.
8 - spi-max-frequency	: Max supported spi frequency.
9 - status		: enable in requried dts.
12 --------------------------
13 - spi-max-frequency	: Max supported spi frequency.
14 - spi-tx-bus-width	: Bus width (number of lines) for writing (1-4)
15 - spi-rx-bus-width	: Bus width (number of lines) for reading (1-4)
16 - memory-map		: Address and size for memory-mapping the flash
20 		compatible = "st,stm32-qspi";
21 		#address-cells = <1>;
22 		#size-cells = <0>;
24 		reg-names = "QuadSPI", "QuadSPI-memory";
26 		spi-max-frequency = <108000000>;
30 			#address-cells = <1>;
31 			#size-cells = <1>;
32 			compatible = "micron,n25q128a13", "spi-flash";
33 			spi-max-frequency = <108000000>;
34 			spi-tx-bus-width = <4>;
35 			spi-rx-bus-width = <4>;
36 			memory-map = <0x90000000 0x1000000>;