21 #define FWSRAM_SR_ADDR_OFFSET(base)	((base) + FWSRAM_SR_ADDR_OFFSET_OFFS)  argument
23 #define FWSRAM_TOP_BOOT_LOG(base)	((base) + FWSRAM_TOP_BOOT_LOG_OFFS)  argument
25 #define FWSRAM_TOP_ROM_KBIST(base)	((base) + FWSRAM_TOP_ROM_KBIST_OFFS)  argument
27 #define FWSRAM_TOP_CID1_H(base)		((base) + FWSRAM_TOP_CID1_H_OFFS)  argument
29 #define FWSRAM_TOP_CID1_L(base)		((base) + FWSRAM_TOP_CID1_L_OFFS)  argument
31 #define FWSRAM_TOP_CID2_H(base)		((base) + FWSRAM_TOP_CID2_H_OFFS)  argument
33 #define FWSRAM_TOP_CID2_L(base)		((base) + FWSRAM_TOP_CID2_L_OFFS)  argument
35 #define FWSRAM_TOP_TDO_CFG(base)	((base) + FWSRAM_TOP_TDO_CFG_OFFS)  argument
37 #define FWSRAM_TOP_GPIO2_0_CFG(base)	((base) + FWSRAM_TOP_GPIO2_0_CFG_OFFS)  argument
39 #define FWSRAM_TOP_GPIO2_1_CFG(base)	((base) + FWSRAM_TOP_GPIO2_1_CFG_OFFS)  argument
41 #define FWSRAM_TOP_GPIO2_2_CFG(base)	((base) + FWSRAM_TOP_GPIO2_2_CFG_OFFS)  argument
43 #define FWSRAM_TOP_GPIO2_3_CFG(base)	((base) + FWSRAM_TOP_GPIO2_3_CFG_OFFS)  argument
45 #define FWSRAM_TOP_GPIO2_4_CFG(base)	((base) + FWSRAM_TOP_GPIO2_4_CFG_OFFS)  argument
47 #define FWSRAM_TOP_GPIO2_5_CFG(base)	((base) + FWSRAM_TOP_GPIO2_5_CFG_OFFS)  argument
49 #define FWSRAM_TOP_GPIO2_6_CFG(base)	((base) + FWSRAM_TOP_GPIO2_6_CFG_OFFS)  argument
51 #define FWSRAM_TOP_GPIO2_7_CFG(base)	((base) + FWSRAM_TOP_GPIO2_7_CFG_OFFS)  argument
53 #define FWSRAM_TOP_SCL_CFG(base)	((base) + FWSRAM_TOP_SCL_CFG_OFFS)  argument
55 #define FWSRAM_TOP_SDA_CFG(base)	((base) + FWSRAM_TOP_SDA_CFG_OFFS)  argument
57 #define FWSRAM_NO_MCM_FLASH(base)	((base) + FWSRAM_NO_MCM_FLASH_OFFS)  argument