Lines Matching +full:build +full:- +full:without +full:- +full:default +full:- +full:devices
5 default "x86"
8 prompt "Run U-Boot in 32/64-bit mode"
9 default X86_RUN_32BIT
11 U-Boot can be built as a 32-bit binary which runs in 32-bit mode
12 even on 64-bit machines. In this case SPL is not used, and U-Boot
13 runs directly from the reset vector (via 16-bit start-up).
15 Alternatively it can be run as a 64-bit binary, thus requiring a
16 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 start-up) then jumps to U-Boot in 64-bit mode.
19 For now, 32-bit mode is recommended, as 64-bit is still
23 bool "32-bit"
25 Build U-Boot as a 32-bit binary with no SPL. This is the currently
26 supported normal setup. U-Boot will stay in 32-bit mode even on
27 64-bit machines. When booting a 64-bit kernel, U-Boot will switch
28 to 64-bit just before starting the kernel. Only the bottom 4GB of
33 bool "64-bit"
39 Build U-Boot as a 64-bit binary with a 32-bit SPL. This is
40 experimental and many features are missing. U-Boot SPL starts up,
41 runs through the 16-bit and 32-bit init, then switches to 64-bit
42 mode and jumps to U-Boot proper.
55 default VENDOR_EMULATION
83 # subarchitectures-specific options below
89 Select to build a U-Boot capable of supporting Intel MID
99 # board-specific options below
109 # platform-specific options below
121 # architecture-specific options below
124 default y
127 default 0x800
131 default 0x100000
136 default ROM_SIZE
140 default 36
144 default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
148 default n
155 default n
158 # The following options control where the 16-bit and 32-bit init lies
159 # If SPL is enabled then it normally holds this init code, and U-Boot proper
160 # is normally a 64-bit build.
162 # The 16-bit init refers to the reset vector and the small amount of code to
163 # get the processor into 32-bit mode. It may be in SPL or in U-Boot proper,
164 # or missing altogether if U-Boot is started from EFI or coreboot.
166 # The 32-bit init refers to processor init, running binary blobs including
168 # 32-bit code. It is normally in the same place as 16-bit init if that is
169 # enabled (i.e. they are both in SPL, or both in U-Boot proper).
173 default y if X86_RESET_VECTOR && !SPL
175 This is enabled when 16-bit init is in U-Boot proper
180 default y if X86_RESET_VECTOR && SPL
182 This is enabled when 16-bit init is in SPL
187 default y if X86_RESET_VECTOR && !SPL
189 This is enabled when 32-bit init is in U-Boot proper
194 default y if X86_RESET_VECTOR && SPL
196 This is enabled when 32-bit init is in SPL
201 default 0xffff0000
206 default 0x10000
211 default 0xfffffff0
216 default 0xfffff800
219 bool "Boot from a 32-bit program"
221 Define this to boot U-Boot from a 32-bit program which sets
224 payload-loading feature.
242 default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
243 default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
244 default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
245 default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
246 default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
247 default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
249 Select the size of the ROM chip you intend to flash U-Boot on.
251 The build system will take care of creating a u-boot.rom file
289 default 512 if UBOOT_ROMSIZE_KB_512
290 default 1024 if UBOOT_ROMSIZE_KB_1024
291 default 2048 if UBOOT_ROMSIZE_KB_2048
292 default 4096 if UBOOT_ROMSIZE_KB_4096
293 default 8192 if UBOOT_ROMSIZE_KB_8192
294 default 16384 if UBOOT_ROMSIZE_KB_16384
299 default 0x80000 if UBOOT_ROMSIZE_KB_512
300 default 0x100000 if UBOOT_ROMSIZE_KB_1024
301 default 0x200000 if UBOOT_ROMSIZE_KB_2048
302 default 0x400000 if UBOOT_ROMSIZE_KB_4096
303 default 0x800000 if UBOOT_ROMSIZE_KB_8192
304 default 0xc00000 if UBOOT_ROMSIZE_KB_12288
305 default 0x1000000 if UBOOT_ROMSIZE_KB_16384
310 Newer higher-end devices have an Intel Management Engine (ME)
320 often crash within U-Boot or the kernel. This option enables a
328 default "descriptor.bin"
336 default "me.bin"
346 the resulting U-Boot image. It is a binary blob which U-Boot uses
349 Note: Without this binary U-Boot will not be able to set up its
355 default "fsp.bin"
363 default 0xfffc0000
367 perferred base address specified during the FSP build. Use Intel's
370 The default base address of 0xfffc0000 indicates that the binary must
376 default 0x2000000
384 default 0x100000
391 default y
403 tell U-Boot to do some additional work to ensure U-Boot relocation
416 please check FSP output HOB via U-Boot command 'fsp hob' to see
427 the resulting U-Boot image. MRC stands for Memory Reference Code.
428 It is a binary blob which U-Boot uses to set up SDRAM.
430 Note: Without this binary U-Boot will not be able to set up its
436 default n
446 default 512
458 start address of the cache-as-RAM (CAR) area and the address varies
466 default 0x40000
469 sets the size of the cache-as-RAM (CAR) area. Note that much of the
470 CAR space is required by the MRC. The CAR space available to U-Boot
487 U-Boot image. This is an Intel binary blob that handles system
490 Note: Without this binary (on platforms that need it such as
491 broadwell) U-Boot will be missing some critical setup steps.
496 default n
498 Enable use of more than one CPU in U-Boot and the Operating System
507 default 4
509 When using multi-CPU chips it is possible for U-Boot to start up
511 pre-allocated so at present U-Boot wants to know the maximum
519 default 0x1000
521 Each additional CPU started by U-Boot requires its own stack. This
542 default "vga.bin"
549 default 0xfff90000
575 default "vbt.bin"
583 default 0xfff90000
593 Turn on this option to enable a framebuffer driver when U-Boot is
599 default 0xf0000
603 those tables, including PIRQ routing table, Multi-Processor
608 default 0x10000
615 default n
618 is generated by U-Boot in the system memory from 0xf0000 to 0xfffff
619 at every 16-byte boundary with a PCI IRQ routing signature ("$PIR").
621 devices' interrupt pins are wired to PIRQs.
629 boot on SFI-only platforms. If you have ACPI tables then these are
632 U-Boot writes this table in write_sfi_table() just before booting
638 bool "Generate an MP (Multi-Processor) table"
639 default n
641 Generate an MP (Multi-Processor) table for this board. The MP table
648 default n
653 by the operating system. It defines platform-independent interfaces
662 Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping
663 state where all system context is lost except system memory. U-Boot
665 It needs restore the memory controller, without overwriting memory
667 registers, U-Boot needs to write the original value. When everything
668 is done, U-Boot needs to find out the wakeup vector provided by OSes
672 bool "Re-run VGA option ROMs on S3 resume"
675 Execute VGA option ROMs in U-Boot when resuming from S3. Normally
679 graphics console won't work without VGA options ROMs. Set it to N
685 default 0x1000
687 Estimated U-Boot's runtime stack size that needs to be reserved
692 default 8
700 default 128
702 U-Boot can support up to 254 IRQ slot info in the PIRQ routing table
703 which in turns forms a table of exact 4KiB. The default value 128
709 default 0xe0000000
711 This is the memory-mapped address of PCI configuration space, which
718 assigned to PCI devices - i.e. the memory and prefetch regions, as
723 default 0x10000000
725 This is the size of memory-mapped address of PCI configuration space,
728 so a default 0x10000000 size covers all of the 256 buses which is the
733 default y
736 slave) interrupt controllers. Include this to have U-Boot set up
741 default y
756 default y
759 Include this to have U-Boot set up the timer correctly.
764 SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
766 of coreboot/U-Boot. By turning on this option, U-Boot prepares
773 default 0x10000
776 SeaBIOS itself resides in E seg and F seg, where U-Boot puts all
777 configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot
782 Increse it if the default size does not fit the board's needs.