Kconfig - OpenGrok cross reference for /openbmc/u-boot/arch/x86/Kconfig

8 	prompt "Run U-Boot in 32/64-bit mode"
11 	  U-Boot can be built as a 32-bit binary which runs in 32-bit mode
12 	  even on 64-bit machines. In this case SPL is not used, and U-Boot
13 	  runs directly from the reset vector (via 16-bit start-up).
15 	  Alternatively it can be run as a 64-bit binary, thus requiring a
16 	  64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 	  start-up) then jumps to U-Boot in 64-bit mode.
19 	  For now, 32-bit mode is recommended, as 64-bit is still
23 	bool "32-bit"
25 	  Build U-Boot as a 32-bit binary with no SPL. This is the currently
26 	  supported normal setup. U-Boot will stay in 32-bit mode even on
27 	  64-bit machines. When booting a 64-bit kernel, U-Boot will switch
28 	  to 64-bit just before starting the kernel. Only the bottom 4GB of
33 	bool "64-bit"
39 	  Build U-Boot as a 64-bit binary with a 32-bit SPL. This is
40 	  experimental and many features are missing. U-Boot SPL starts up,
41 	  runs through the 16-bit and 32-bit init, then switches to 64-bit
42 	  mode and jumps to U-Boot proper.
83 # subarchitectures-specific options below
89 	  Select to build a U-Boot capable of supporting Intel MID
99 # board-specific options below
109 # platform-specific options below
121 # architecture-specific options below
158 # The following options control where the 16-bit and 32-bit init lies
159 # If SPL is enabled then it normally holds this init code, and U-Boot proper
160 # is normally a 64-bit build.
162 # The 16-bit init refers to the reset vector and the small amount of code to
163 # get the processor into 32-bit mode. It may be in SPL or in U-Boot proper,
164 # or missing altogether if U-Boot is started from EFI or coreboot.
166 # The 32-bit init refers to processor init, running binary blobs including
168 # 32-bit code. It is normally in the same place as 16-bit init if that is
169 # enabled (i.e. they are both in SPL, or both in U-Boot proper).
175 	  This is enabled when 16-bit init is in U-Boot proper
182 	  This is enabled when 16-bit init is in SPL
189 	  This is enabled when 32-bit init is in U-Boot proper
196 	  This is enabled when 32-bit init is in SPL
219 	bool "Boot from a 32-bit program"
221 	  Define this to boot U-Boot from a 32-bit program which sets
224 	  payload-loading feature.
249 	  Select the size of the ROM chip you intend to flash U-Boot on.
251 	  The build system will take care of creating a u-boot.rom file
310 	  Newer higher-end devices have an Intel Management Engine (ME)
320 	  often crash within U-Boot or the kernel. This option enables a
346 	  the resulting U-Boot image. It is a binary blob which U-Boot uses
349 	  Note: Without this binary U-Boot will not be able to set up its
403 	  tell U-Boot to do some additional work to ensure U-Boot relocation
416 	  please check FSP output HOB via U-Boot command 'fsp hob' to see
427 	  the resulting U-Boot image. MRC stands for Memory Reference Code.
428 	  It is a binary blob which U-Boot uses to set up SDRAM.
430 	  Note: Without this binary U-Boot will not be able to set up its
458 	  start address of the cache-as-RAM (CAR) area and the address varies
469 	  sets the size of the cache-as-RAM (CAR) area. Note that much of the
470 	  CAR space is required by the MRC. The CAR space available to U-Boot
487           U-Boot image. This is an Intel binary blob that handles system
491           broadwell) U-Boot will be missing some critical setup steps.
498 	  Enable use of more than one CPU in U-Boot and the Operating System
509 	  When using multi-CPU chips it is possible for U-Boot to start up
511 	  pre-allocated so at present U-Boot wants to know the maximum
521 	  Each additional CPU started by U-Boot requires its own stack. This
593 	  Turn on this option to enable a framebuffer driver when U-Boot is
603 	  those tables, including PIRQ routing table, Multi-Processor
618 	  is generated by U-Boot in the system memory from 0xf0000 to 0xfffff
619 	  at every 16-byte boundary with a PCI IRQ routing signature ("$PIR").
629 	  boot on SFI-only platforms.  If you have ACPI tables then these are
632 	  U-Boot writes this table in write_sfi_table() just before booting
638 	bool "Generate an MP (Multi-Processor) table"
641 	  Generate an MP (Multi-Processor) table for this board. The MP table
653 	  by the operating system. It defines platform-independent interfaces
662 	  Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping
663 	  state where all system context is lost except system memory. U-Boot
667 	  registers, U-Boot needs to write the original value. When everything
668 	  is done, U-Boot needs to find out the wakeup vector provided by OSes
672 	bool "Re-run VGA option ROMs on S3 resume"
675 	  Execute VGA option ROMs in U-Boot when resuming from S3. Normally
687 	  Estimated U-Boot's runtime stack size that needs to be reserved
702 	  U-Boot can support up to 254 IRQ slot info in the PIRQ routing table
711 	  This is the memory-mapped address of PCI configuration space, which
713 	  Mechanism (ECAM) with PCI Express. It can be set up almost
718 	  assigned to PCI devices - i.e. the memory and prefetch regions, as
725 	  This is the size of memory-mapped address of PCI configuration space,
727 	  Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory,
736 	  slave) interrupt controllers. Include this to have U-Boot set up
759 	  Include this to have U-Boot set up the timer correctly.
764 	  SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
766 	  of coreboot/U-Boot. By turning on this option, U-Boot prepares
776 	  SeaBIOS itself resides in E seg and F seg, where U-Boot puts all
777 	  configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot