Lines Matching refs:BASE_CFG
16 register u32 reg = readl(BASE_CFG + ICPU_GENERAL_CTRL); in _machine_restart()
22 writel(reg, BASE_CFG + ICPU_GENERAL_CTRL); in _machine_restart()
24 reg = readl(BASE_CFG + ICPU_GENERAL_CTRL); in _machine_restart()
26 writel(readl(BASE_CFG + ICPU_RESET) | in _machine_restart()
29 BASE_CFG + ICPU_RESET); in _machine_restart()
34 writel(ICPU_RESET_CORE_RST_PROTECT, BASE_CFG + ICPU_RESET); in _machine_restart()
43 writel(readl(BASE_CFG + ICPU_MEMCTRL_CTRL) | in _machine_restart()
45 BASE_CFG + ICPU_MEMCTRL_CTRL); in _machine_restart()
47 while (!(readl(BASE_CFG + ICPU_MEMCTRL_STAT) & in _machine_restart()
52 writel(ICPU_RESET_CORE_RST_FORCE, BASE_CFG + ICPU_RESET); in _machine_restart()
58 clrbits_le32(BASE_CFG + ICPU_RESET, ICPU_RESET_CORE_RST_PROTECT); in _machine_restart()
62 ICPU_SW_MODE_SW_PIN_CTRL_MODE, BASE_CFG + ICPU_SW_MODE); in _machine_restart()