Lines Matching full:issued

94 	/* A mode register set(MRS) cycle is issued to reset DLL */  in ddr2_init()
108 	/* A mode register set (MRS) cycle is issued to disable DLL reset */  in ddr2_init()
116 	 * An extended mode register set (EMRS1) cycle is issued  in ddr2_init()
127 	 * An extended mode register set (EMRS1) cycle is issued  in ddr2_init()
172 	/* A NOP command is issued to the DDR3-SRAM */  in ddr3_init()
178 	/* A NOP command is issued to the DDR3-SDRAM */  in ddr3_init()
182 	 * An Extended Mode Register Set (EMRS2) cycle is issued to choose  in ddr3_init()
188 	 * Step 7: An Extended Mode Register Set (EMRS3) cycle is issued to set  in ddr3_init()
194 	 * An Extended Mode Register Set (EMRS1) cycle is issued to disable and  in ddr3_init()
205 	/* A Mode Register Set (MRS) cycle is issued to reset DLL. */  in ddr3_init()
211 	 * A Calibration command (MRS) is issued to calibrate RTT and RON  in ddr3_init()