Lines Matching +full:0 +full:xff0f0000
22 #size-cells = <0>;
24 cpu0: cpu@0 {
29 reg = <0x0>;
37 reg = <0x1>;
46 reg = <0x2>;
55 reg = <0x3>;
63 CPU_SLEEP_0: cpu-sleep-0 {
65 arm,psci-suspend-param = <0x40000000>;
108 interrupts = <0 143 4>,
109 <0 144 4>,
110 <0 145 4>,
111 <0 146 4>;
123 interrupts = <0 35 4>;
129 interrupts = <1 13 0xf08>,
130 <1 14 0xf08>,
131 <1 11 0xf08>,
132 <1 10 0xf08>;
151 soc_revision: soc_revision@0 {
152 reg = <0x0 0x4>;
205 dmas = <&xlnx_dpdma 0>,
213 amba_apu: amba_apu@0 {
217 ranges = <0 0 0 0 0xffffffff>;
222 reg = <0x0 0xf9010000 0x10000>,
223 <0x0 0xf9020000 0x20000>,
224 <0x0 0xf9040000 0x20000>,
225 <0x0 0xf9060000 0x20000>;
228 interrupts = <1 9 0xf04>;
243 reg = <0x0 0xff060000 0x0 0x1000>;
244 interrupts = <0 23 4>;
246 tx-fifo-depth = <0x40>;
247 rx-fifo-depth = <0x40>;
254 reg = <0x0 0xff070000 0x0 0x1000>;
255 interrupts = <0 24 4>;
257 tx-fifo-depth = <0x40>;
258 rx-fifo-depth = <0x40>;
263 reg = <0x0 0xfd6e0000 0x0 0x9000>;
264 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
270 reg = <0x9000 0x5000>;
272 interrupts = <0 123 4>,
273 <0 123 4>,
274 <0 123 4>,
275 <0 123 4>,
276 <0 123 4>;
284 reg = <0x0 0xfd500000 0x0 0x1000>;
286 interrupts = <0 124 4>;
290 iommus = <&smmu 0x14e8>;
296 reg = <0x0 0xfd510000 0x0 0x1000>;
298 interrupts = <0 125 4>;
302 iommus = <&smmu 0x14e9>;
308 reg = <0x0 0xfd520000 0x0 0x1000>;
310 interrupts = <0 126 4>;
314 iommus = <&smmu 0x14ea>;
320 reg = <0x0 0xfd530000 0x0 0x1000>;
322 interrupts = <0 127 4>;
326 iommus = <&smmu 0x14eb>;
332 reg = <0x0 0xfd540000 0x0 0x1000>;
334 interrupts = <0 128 4>;
338 iommus = <&smmu 0x14ec>;
344 reg = <0x0 0xfd550000 0x0 0x1000>;
346 interrupts = <0 129 4>;
350 iommus = <&smmu 0x14ed>;
356 reg = <0x0 0xfd560000 0x0 0x1000>;
358 interrupts = <0 130 4>;
362 iommus = <&smmu 0x14ee>;
368 reg = <0x0 0xfd570000 0x0 0x1000>;
370 interrupts = <0 131 4>;
374 iommus = <&smmu 0x14ef>;
380 reg = <0x0 0xfd4b0000 0x0 0x10000>;
382 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
394 reg = <0x0 0xffa80000 0x0 0x1000>;
396 interrupts = <0 77 4>;
400 iommus = <&smmu 0x868>;
406 reg = <0x0 0xffa90000 0x0 0x1000>;
408 interrupts = <0 78 4>;
412 iommus = <&smmu 0x869>;
418 reg = <0x0 0xffaa0000 0x0 0x1000>;
420 interrupts = <0 79 4>;
424 iommus = <&smmu 0x86a>;
430 reg = <0x0 0xffab0000 0x0 0x1000>;
432 interrupts = <0 80 4>;
436 iommus = <&smmu 0x86b>;
442 reg = <0x0 0xffac0000 0x0 0x1000>;
444 interrupts = <0 81 4>;
448 iommus = <&smmu 0x86c>;
454 reg = <0x0 0xffad0000 0x0 0x1000>;
456 interrupts = <0 82 4>;
460 iommus = <&smmu 0x86d>;
466 reg = <0x0 0xffae0000 0x0 0x1000>;
468 interrupts = <0 83 4>;
472 iommus = <&smmu 0x86e>;
478 reg = <0x0 0xffaf0000 0x0 0x1000>;
480 interrupts = <0 84 4>;
484 iommus = <&smmu 0x86f>;
489 reg = <0x0 0xfd070000 0x0 0x30000>;
491 interrupts = <0 112 4>;
497 reg = <0x0 0xff100000 0x0 0x1000>;
500 interrupts = <0 14 4>;
504 iommus = <&smmu 0x872>;
511 interrupts = <0 57 4>, <0 57 4>;
512 reg = <0x0 0xff0b0000 0x0 0x1000>;
515 #size-cells = <0>;
517 iommus = <&smmu 0x874>;
524 interrupts = <0 59 4>, <0 59 4>;
525 reg = <0x0 0xff0c0000 0x0 0x1000>;
528 #size-cells = <0>;
530 iommus = <&smmu 0x875>;
537 interrupts = <0 61 4>, <0 61 4>;
538 reg = <0x0 0xff0d0000 0x0 0x1000>;
541 #size-cells = <0>;
543 iommus = <&smmu 0x876>;
550 interrupts = <0 63 4>, <0 63 4>;
551 reg = <0x0 0xff0e0000 0x0 0x1000>;
554 #size-cells = <0>;
556 iommus = <&smmu 0x877>;
562 #gpio-cells = <0x2>;
564 interrupts = <0 16 4>;
567 reg = <0x0 0xff0a0000 0x0 0x1000>;
575 interrupts = <0 17 4>;
576 reg = <0x0 0xff020000 0x0 0x1000>;
578 #size-cells = <0>;
585 interrupts = <0 18 4>;
586 reg = <0x0 0xff030000 0x0 0x1000>;
588 #size-cells = <0>;
593 reg = <0x0 0xff960000 0x0 0x1000>;
595 interrupts = <0 10 4>;
607 interrupts = <0 118 4>,
608 <0 117 4>,
609 <0 116 4>,
610 <0 115 4>, /* MSI_1 [63...32] */
611 <0 114 4>; /* MSI_0 [31...0] */
615 reg = <0x0 0xfd0e0000 0x0 0x1000>,
616 <0x0 0xfd480000 0x0 0x1000>,
617 <0x80 0x00000000 0x0 0x1000000>;
619 …ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-pref…
620 …0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memo…
621 bus-range = <0x00 0xff>;
622 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
623 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
624 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
625 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
626 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
629 #address-cells = <0>;
639 interrupts = <0 15 4>;
642 reg = <0x0 0xff0f0000 0x0 0x1000>,
643 <0x0 0xc0000000 0x0 0x8000000>;
645 #size-cells = <0>;
647 iommus = <&smmu 0x873>;
653 reg = <0x0 0xffa60000 0x0 0x100>;
655 interrupts = <0 26 4>, <0 27 4>;
657 calibration = <0x8000>;
663 reg = <0x0 0xfd400000 0x0 0x40000>,
664 <0x0 0xfd3d0000 0x0 0x1000>,
665 <0x0 0xff5e0000 0x0 0x1000>;
694 reg = <0x0 0xfd0c0000 0x0 0x2000>;
696 interrupts = <0 133 4>;
698 iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
699 <&smmu 0x4c2>, <&smmu 0x4c3>;
708 interrupts = <0 48 4>;
709 reg = <0x0 0xff160000 0x0 0x1000>;
711 xlnx,device_id = <0>;
713 iommus = <&smmu 0x870>;
723 interrupts = <0 49 4>;
724 reg = <0x0 0xff170000 0x0 0x1000>;
728 iommus = <&smmu 0x871>;
736 reg = <0x0 0xff180000 0x0 0x1000>;
741 reg = <0x0 0xfd800000 0x0 0x20000>;
746 interrupts = <0 155 4>,
747 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
748 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
749 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
750 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
757 interrupts = <0 19 4>;
758 reg = <0x0 0xff040000 0x0 0x1000>;
761 #size-cells = <0>;
768 interrupts = <0 20 4>;
769 reg = <0x0 0xff050000 0x0 0x1000>;
772 #size-cells = <0>;
779 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
780 reg = <0x0 0xff110000 0x0 0x1000>;
788 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
789 reg = <0x0 0xff120000 0x0 0x1000>;
797 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
798 reg = <0x0 0xff130000 0x0 0x1000>;
806 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
807 reg = <0x0 0xff140000 0x0 0x1000>;
816 interrupts = <0 21 4>;
817 reg = <0x0 0xff000000 0x0 0x1000>;
826 interrupts = <0 22 4>;
827 reg = <0x0 0xff010000 0x0 0x1000>;
836 reg = <0x0 0xff9d0000 0x0 0x100>;
845 reg = <0x0 0xfe200000 0x0 0x40000>;
847 interrupts = <0 65 4>, <0 69 4>;
849 iommus = <&smmu 0x860>;
850 snps,quirk-frame-length-adjustment = <0x20>;
861 reg = <0x0 0xff9e0000 0x0 0x100>;
870 reg = <0x0 0xfe300000 0x0 0x40000>;
872 interrupts = <0 70 4>, <0 74 4>;
874 iommus = <&smmu 0x861>;
875 snps,quirk-frame-length-adjustment = <0x20>;
885 interrupts = <0 113 1>;
886 reg = <0x0 0xfd4d0000 0x0 0x1000>;
895 interrupts = <0 56 4>;
897 reg = <0x0 0xffa50000 0x0 0x800>;
907 reg = <0x0 0xffa50800 0x0 0x400>;
913 reg = <0x0 0xffa50c00 0x0 0x400>;
920 reg = <0x0 0xfd4a0000 0x0 0x1000>;
921 interrupts = <0 119 4>;
939 reg = <0x0 0xfd4aa000 0x0 0x1000>,
940 <0x0 0xfd4ab000 0x0 0x1000>,
941 <0x0 0xfd4ac000 0x0 0x1000>;
951 reg = <0x0 0xfd4c0000 0x0 0x1000>;
952 interrupts = <0 122 4>;