Lines Matching +full:0 +full:xfed40000

382 		This is the value to write into CCSR offset 0x18600
1006 0xfed40000.
1045 # modprobe usbserial vendor=0xVendorID product=0xProductID
1088 - CONFIG_USBD_VENDORID 0xFFFF
1093 - CONFIG_USBD_PRODUCTID 0xFFFF
1271 0 = no rotation respectively 0 degree
1277 initialized with 0degree rotation.
1424 1st BOOTP request: delay 0 ... 1 sec
1425 2nd BOOTP request: delay 0 ... 2 sec
1426 3rd BOOTP request: delay 0 ... 4 sec
1428 BOOTP requests: delay 0 ... 8 sec
1526 0x00000010 for a normal host which does not forwards.
1614 100000 and the slave addr 0!
1618 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
1636 for speed, and 0 for slave.
1642 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
1643 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
1656 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
1657 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
1670 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
1671 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
1685 with a fix speed from 100000 and the slave addr 0!
1689 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
1690 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
1691 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
1702 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
1703 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
1718 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
1732 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
1733 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
1734 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
1735 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
1736 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
1737 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
1739 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
1740 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
1744 bus 0 on adapter 0 without a mux
1745 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
1746 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
1747 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
1748 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
1749 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
1751 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
1752 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
1789 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1855 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
1857 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1860 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
1862 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1867 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1872 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2107 "myvar1=value1\0" \
2108 "myvar2=value2\0"
2257 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
2401 default: 0
2405 default: 0
2583 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2584 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2605 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2606 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2708 Physical start address of SDRAM. _Must_ be 0 here.
2905 b - Boolean ([1yYtT|0nNfF])
3038 either 0 (32-bit build) or 0xF (36-bit build). This macro is
3054 the default drive number (default value 0)
3065 the FDC chipset. (default value 0)
3632 at physical address 0x10000000, while Linux kernel
3634 may need to set fdt_high as 0x3C000000 to have the
3639 If this is set to the special value 0xFFFFFFFF then
3663 variable to a value of "no" or "off" or "0".
3677 If you set initrd_high to 0xFFFFFFFF, this is an
3748 unit, minimum value = 0). Defines how many timeouts
3750 transfer is aborted. The default is 10, and 0 means
3864 The return value is 0 if the variable change is accepted and 1 otherwise.
4085 -a 0 -e 0 -n "Linux Kernel Image" \
4121 address (0x00000000), but the entry point address depends on the
4124 - 2.2.x kernels have the entry point at 0x0000000C,
4125 - 2.3.x and later kernels have the entry point at 0x00000000.
4130 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
4137 Load Address: 0x00000000
4138 Entry Point: 0x00000000
4147 Load Address: 0x00000000
4148 Entry Point: 0x00000000
4157 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
4164 Load Address: 0x00000000
4165 Entry Point: 0x00000000
4178 Load Address: 0x00000000
4179 Entry Point: 0x00000000
4189 -p ==> 'position' (starting at 0) of the 'data_file' inside the 'image'
4202 address 0x00000000. To load it to a given address, you need to
4206 Example: install the image to address 0x40100000 (which on the
4222 ## Start Addr = 0x00000000
4234 Data Size: 335725 Bytes = 327 kB = 0 MB
4262 Data Size: 381681 Bytes = 372 kB = 0 MB
4283 Data Size: 335725 Bytes = 327 kB = 0 MB
4291 Data Size: 566530 Bytes = 553 kB = 0 MB
4300 Data Size: 335725 Bytes = 327 kB = 0 MB
4308 Data Size: 566530 Bytes = 553 kB = 0 MB
4318 RAMDISK: Compressed image found at block 0
4332 oftaddr=0x300000
4340 Load address: 0x300000
4349 Load address: 0x200000
4356 oftaddr=0x300000
4366 Booting using flat device tree at 0x300000
4368 Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
4398 byte order. This list is terminated by an "(uint32_t)0".
4399 Immediately after the terminating 0 follow the images, one by
4439 It's configured to run at address 0x00040004, so you can play with it
4448 ## Start Addr = 0x00040004
4451 ## Starting application at 0x00040004 ...
4454 argv[0] = "40004"
4464 ## Application terminated, rc = 0x0
4484 ## Start Addr = 0x00040004
4487 ## Starting application at 0x00040004 ...
4488 TIMERS=0xfff00980
4490 …tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0
4497 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
4500 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
4503 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
4506 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
4510 [q, b, e, ?] ## Application terminated, rc = 0x0
4742 TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
4750 of DRAM (0x00000000 ... 0x00001FFF).
4755 0x0000 0000 Exception Vector code
4757 0x0000 1FFF
4758 0x0000 2000 Free for Application Use
4764 0x00FB FF20 Monitor Stack (Growing downward)
4765 0x00FB FFAC Board Info Data and permanent copy of global data
4766 0x00FC 0000 Malloc Arena
4768 0x00FD FFFF
4769 0x00FE 0000 RAM Copy of Monitor Code
4772 0x00FF FFFF [End of RAM]
4779 (on most PowerPC systems at address 0x00000100). Because of the reset
4790 (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
4791 on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
4799 0x00000000, with any additional banks following immediately to create
4800 contiguous memory starting from 0.
4829 return 0;
4878 return 0;