67 static TCGv cpu_psw_o, cpu_psw_s, cpu_psw_z, cpu_psw_c;  variable
256         dc->value = cpu_psw_z;  in psw_cond()
260         dc->value = cpu_psw_z;  in psw_cond()
272         tcg_gen_setcondi_i32(TCG_COND_NE, dc->temp, cpu_psw_z, 0);  in psw_cond()
295         tcg_gen_andc_i32(dc->temp, cpu_psw_z, dc->temp);  in psw_cond()
733     tcg_gen_movcond_i32(cond, cpu_regs[rd], cpu_psw_z, z,  in stcond()
833     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_and()
863     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_or()
893     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_xor()
915     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_tst()
936     tcg_gen_mov_i32(cpu_psw_z, ret);  in rx_not()
953     tcg_gen_mov_i32(cpu_psw_z, ret);  in rx_neg()
973     tcg_gen_xor_i32(cpu_psw_z, arg1, arg2);  in rx_adc()
974     tcg_gen_andc_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z);  in rx_adc()
975     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_adc()
1010     tcg_gen_xor_i32(cpu_psw_z, arg1, arg2);  in rx_add()
1011     tcg_gen_andc_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z);  in rx_add()
1012     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_add()
1045     tcg_gen_xor_i32(cpu_psw_z, arg1, arg2);  in rx_sub()
1046     tcg_gen_and_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z);  in rx_sub()
1047     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_s);  in rx_sub()
1300     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[a->rd]);  in trans_SHLL_irr()
1332     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[a->rd]);  in trans_SHLL_rr()
1353     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[rd]);  in shiftr_imm()
1385     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[rd]);  in shiftr_reg()
1428     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[a->rd]);  in trans_ROLC()
1443     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[a->rd]);  in trans_RORC()
1470     tcg_gen_mov_i32(cpu_psw_z, cpu_regs[rd]);  in rx_rot()
1922     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_c);  in rx_btstm()
1950     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_c);  in rx_btstr()
2056             tcg_gen_movi_i32(cpu_psw_z, val == 0);  in clrsetpsw()