Lines Matching refs:cpu_psw_o
67 static TCGv cpu_psw_o, cpu_psw_s, cpu_psw_z, cpu_psw_c; variable
287 tcg_gen_xor_i32(dc->temp, cpu_psw_o, cpu_psw_s); in psw_cond()
293 tcg_gen_xor_i32(dc->temp, cpu_psw_o, cpu_psw_s); in psw_cond()
301 dc->value = cpu_psw_o; in psw_cond()
305 dc->value = cpu_psw_o; in psw_cond()
950 tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_o, arg1, 0x80000000); in rx_neg()
972 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_adc()
974 tcg_gen_andc_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z); in rx_adc()
1009 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_add()
1011 tcg_gen_andc_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z); in rx_add()
1044 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_sub()
1046 tcg_gen_and_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z); in rx_sub()
1291 tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_o, cpu_psw_c, 0); in trans_SHLL_irr()
1293 tcg_gen_or_i32(cpu_psw_o, cpu_psw_o, tmp); in trans_SHLL_irr()
1298 tcg_gen_movi_i32(cpu_psw_o, 0); in trans_SHLL_irr()
1321 tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_o, cpu_psw_c, 0); in trans_SHLL_rr()
1323 tcg_gen_or_i32(cpu_psw_o, cpu_psw_o, tmp); in trans_SHLL_rr()
1329 tcg_gen_movi_i32(cpu_psw_o, 0); in trans_SHLL_rr()
1352 tcg_gen_movi_i32(cpu_psw_o, 0); in shiftr_imm()
1384 tcg_gen_movi_i32(cpu_psw_o, 0); in shiftr_reg()
1817 cpu_psw_o, z, tmp, cpu_regs[a->rd]); in trans_SAT()
2062 tcg_gen_movi_i32(cpu_psw_o, val << 31); in clrsetpsw()