Lines Matching refs:a
17 * You should have received a copy of the GNU General Public License along with
42 static bool trans_fld(DisasContext *ctx, arg_fld *a)
50 addr = get_address(ctx, a->rs1, a->imm);
51 tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], addr, ctx->mem_idx, MO_TEUQ);
57 static bool trans_fsd(DisasContext *ctx, arg_fsd *a)
65 addr = get_address(ctx, a->rs1, a->imm);
66 tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, MO_TEUQ);
70 static bool trans_c_fld(DisasContext *ctx, arg_fld *a)
73 return trans_fld(ctx, a);
76 static bool trans_c_fsd(DisasContext *ctx, arg_fsd *a)
79 return trans_fsd(ctx, a);
82 static bool trans_fmadd_d(DisasContext *ctx, arg_fmadd_d *a)
86 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
88 TCGv_i64 dest = dest_fpr(ctx, a->rd);
89 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
90 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
91 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
93 gen_set_rm(ctx, a->rm);
95 gen_set_fpr_d(ctx, a->rd, dest);
100 static bool trans_fmsub_d(DisasContext *ctx, arg_fmsub_d *a)
104 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
106 TCGv_i64 dest = dest_fpr(ctx, a->rd);
107 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
108 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
109 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
111 gen_set_rm(ctx, a->rm);
113 gen_set_fpr_d(ctx, a->rd, dest);
118 static bool trans_fnmsub_d(DisasContext *ctx, arg_fnmsub_d *a)
122 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
124 TCGv_i64 dest = dest_fpr(ctx, a->rd);
125 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
126 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
127 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
129 gen_set_rm(ctx, a->rm);
131 gen_set_fpr_d(ctx, a->rd, dest);
136 static bool trans_fnmadd_d(DisasContext *ctx, arg_fnmadd_d *a)
140 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2 | a->rs3);
142 TCGv_i64 dest = dest_fpr(ctx, a->rd);
143 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
144 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
145 TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
147 gen_set_rm(ctx, a->rm);
149 gen_set_fpr_d(ctx, a->rd, dest);
154 static bool trans_fadd_d(DisasContext *ctx, arg_fadd_d *a)
158 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
160 TCGv_i64 dest = dest_fpr(ctx, a->rd);
161 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
162 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
164 gen_set_rm(ctx, a->rm);
166 gen_set_fpr_d(ctx, a->rd, dest);
171 static bool trans_fsub_d(DisasContext *ctx, arg_fsub_d *a)
175 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
177 TCGv_i64 dest = dest_fpr(ctx, a->rd);
178 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
179 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
181 gen_set_rm(ctx, a->rm);
183 gen_set_fpr_d(ctx, a->rd, dest);
188 static bool trans_fmul_d(DisasContext *ctx, arg_fmul_d *a)
192 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
194 TCGv_i64 dest = dest_fpr(ctx, a->rd);
195 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
196 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
198 gen_set_rm(ctx, a->rm);
200 gen_set_fpr_d(ctx, a->rd, dest);
205 static bool trans_fdiv_d(DisasContext *ctx, arg_fdiv_d *a)
209 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
211 TCGv_i64 dest = dest_fpr(ctx, a->rd);
212 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
213 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
215 gen_set_rm(ctx, a->rm);
217 gen_set_fpr_d(ctx, a->rd, dest);
222 static bool trans_fsqrt_d(DisasContext *ctx, arg_fsqrt_d *a)
226 REQUIRE_EVEN(ctx, a->rd | a->rs1);
228 TCGv_i64 dest = dest_fpr(ctx, a->rd);
229 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
231 gen_set_rm(ctx, a->rm);
233 gen_set_fpr_d(ctx, a->rd, dest);
238 static bool trans_fsgnj_d(DisasContext *ctx, arg_fsgnj_d *a)
242 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
244 TCGv_i64 dest = dest_fpr(ctx, a->rd);
245 if (a->rs1 == a->rs2) { /* FMOV */
246 dest = get_fpr_d(ctx, a->rs1);
248 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
249 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
252 gen_set_fpr_d(ctx, a->rd, dest);
257 static bool trans_fsgnjn_d(DisasContext *ctx, arg_fsgnjn_d *a)
261 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
263 TCGv_i64 dest = dest_fpr(ctx, a->rd);
264 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
266 if (a->rs1 == a->rs2) { /* FNEG */
269 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
274 gen_set_fpr_d(ctx, a->rd, dest);
279 static bool trans_fsgnjx_d(DisasContext *ctx, arg_fsgnjx_d *a)
283 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
285 TCGv_i64 dest = dest_fpr(ctx, a->rd);
286 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
288 if (a->rs1 == a->rs2) { /* FABS */
291 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
296 gen_set_fpr_d(ctx, a->rd, dest);
301 static bool trans_fmin_d(DisasContext *ctx, arg_fmin_d *a)
305 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
307 TCGv_i64 dest = dest_fpr(ctx, a->rd);
308 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
309 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
312 gen_set_fpr_d(ctx, a->rd, dest);
317 static bool trans_fmax_d(DisasContext *ctx, arg_fmax_d *a)
321 REQUIRE_EVEN(ctx, a->rd | a->rs1 | a->rs2);
323 TCGv_i64 dest = dest_fpr(ctx, a->rd);
324 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
325 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
328 gen_set_fpr_d(ctx, a->rd, dest);
333 static bool trans_fcvt_s_d(DisasContext *ctx, arg_fcvt_s_d *a)
337 REQUIRE_EVEN(ctx, a->rs1);
339 TCGv_i64 dest = dest_fpr(ctx, a->rd);
340 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
342 gen_set_rm(ctx, a->rm);
344 gen_set_fpr_hs(ctx, a->rd, dest);
349 static bool trans_fcvt_d_s(DisasContext *ctx, arg_fcvt_d_s *a)
353 REQUIRE_EVEN(ctx, a->rd);
355 TCGv_i64 dest = dest_fpr(ctx, a->rd);
356 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
358 gen_set_rm(ctx, a->rm);
360 gen_set_fpr_d(ctx, a->rd, dest);
365 static bool trans_feq_d(DisasContext *ctx, arg_feq_d *a)
369 REQUIRE_EVEN(ctx, a->rs1 | a->rs2);
371 TCGv dest = dest_gpr(ctx, a->rd);
372 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
373 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
376 gen_set_gpr(ctx, a->rd, dest);
380 static bool trans_flt_d(DisasContext *ctx, arg_flt_d *a)
384 REQUIRE_EVEN(ctx, a->rs1 | a->rs2);
386 TCGv dest = dest_gpr(ctx, a->rd);
387 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
388 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
391 gen_set_gpr(ctx, a->rd, dest);
395 static bool trans_fle_d(DisasContext *ctx, arg_fle_d *a)
399 REQUIRE_EVEN(ctx, a->rs1 | a->rs2);
401 TCGv dest = dest_gpr(ctx, a->rd);
402 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
403 TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
406 gen_set_gpr(ctx, a->rd, dest);
410 static bool trans_fclass_d(DisasContext *ctx, arg_fclass_d *a)
414 REQUIRE_EVEN(ctx, a->rs1);
416 TCGv dest = dest_gpr(ctx, a->rd);
417 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
420 gen_set_gpr(ctx, a->rd, dest);
424 static bool trans_fcvt_w_d(DisasContext *ctx, arg_fcvt_w_d *a)
428 REQUIRE_EVEN(ctx, a->rs1);
430 TCGv dest = dest_gpr(ctx, a->rd);
431 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
433 gen_set_rm(ctx, a->rm);
435 gen_set_gpr(ctx, a->rd, dest);
439 static bool trans_fcvt_wu_d(DisasContext *ctx, arg_fcvt_wu_d *a)
443 REQUIRE_EVEN(ctx, a->rs1);
445 TCGv dest = dest_gpr(ctx, a->rd);
446 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
448 gen_set_rm(ctx, a->rm);
450 gen_set_gpr(ctx, a->rd, dest);
454 static bool trans_fcvt_d_w(DisasContext *ctx, arg_fcvt_d_w *a)
458 REQUIRE_EVEN(ctx, a->rd);
460 TCGv_i64 dest = dest_fpr(ctx, a->rd);
461 TCGv src = get_gpr(ctx, a->rs1, EXT_SIGN);
463 gen_set_rm(ctx, a->rm);
465 gen_set_fpr_d(ctx, a->rd, dest);
471 static bool trans_fcvt_d_wu(DisasContext *ctx, arg_fcvt_d_wu *a)
475 REQUIRE_EVEN(ctx, a->rd);
477 TCGv_i64 dest = dest_fpr(ctx, a->rd);
478 TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);
480 gen_set_rm(ctx, a->rm);
482 gen_set_fpr_d(ctx, a->rd, dest);
488 static bool trans_fcvt_l_d(DisasContext *ctx, arg_fcvt_l_d *a)
493 REQUIRE_EVEN(ctx, a->rs1);
495 TCGv dest = dest_gpr(ctx, a->rd);
496 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
498 gen_set_rm(ctx, a->rm);
500 gen_set_gpr(ctx, a->rd, dest);
504 static bool trans_fcvt_lu_d(DisasContext *ctx, arg_fcvt_lu_d *a)
509 REQUIRE_EVEN(ctx, a->rs1);
511 TCGv dest = dest_gpr(ctx, a->rd);
512 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
514 gen_set_rm(ctx, a->rm);
516 gen_set_gpr(ctx, a->rd, dest);
520 static bool trans_fmv_x_d(DisasContext *ctx, arg_fmv_x_d *a)
527 gen_set_gpr(ctx, a->rd, cpu_fpr[a->rs1]);
534 static bool trans_fcvt_d_l(DisasContext *ctx, arg_fcvt_d_l *a)
539 REQUIRE_EVEN(ctx, a->rd);
541 TCGv_i64 dest = dest_fpr(ctx, a->rd);
542 TCGv src = get_gpr(ctx, a->rs1, EXT_SIGN);
544 gen_set_rm(ctx, a->rm);
546 gen_set_fpr_d(ctx, a->rd, dest);
552 static bool trans_fcvt_d_lu(DisasContext *ctx, arg_fcvt_d_lu *a)
557 REQUIRE_EVEN(ctx, a->rd);
559 TCGv_i64 dest = dest_fpr(ctx, a->rd);
560 TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);
562 gen_set_rm(ctx, a->rm);
564 gen_set_fpr_d(ctx, a->rd, dest);
570 static bool trans_fmv_d_x(DisasContext *ctx, arg_fmv_d_x *a)
577 tcg_gen_mov_tl(cpu_fpr[a->rd], get_gpr(ctx, a->rs1, EXT_NONE));