Lines Matching full:hexagon

1 Hexagon is Qualcomm's very long instruction word (VLIW) digital signal
2 processor(DSP).  We also support Hexagon Vector eXtensions (HVX).  HVX
6 The following versions of the Hexagon core are supported
8 …  https://developer.qualcomm.com/downloads/qualcomm-hexagon-v73-programmers-reference-manual-rev-aa
10 …https://developer.qualcomm.com/downloads/qualcomm-hexagon-v73-hvx-programmers-reference-manual-rev…
13 …https://kvmforum2019.sched.com/event/Tmwc/qemu-hexagon-automatic-translation-of-the-isa-manual-pse…
17 The qemu-hexagon implementation is a combination of qemu and the Hexagon
19 Hexagon-specific code are
21     qemu/target/hexagon
23     qemu/target/hexagon/imported
30     qemu/target/hexagon/idef-parser
34     qemu/linux-user/hexagon
41 target/hexagon/gen_semantics.c.  This step produces
42     <BUILD_DIR>/target/hexagon/semantics_generated.pyinc.
44 header files in <BUILD_DIR>/target/hexagon
192 Step 1 is to run target/hexagon/gen_dectree_import.c to produce
193     <BUILD_DIR>/target/hexagon/iset.py
194 Step 2 is to import iset.py into target/hexagon/gen_decodetree.py to produce
195     <BUILD_DIR>/target/hexagon/normal_decode_generated
196     <BUILD_DIR>/target/hexagon/hvx_decode_generated
197     <BUILD_DIR>/target/hexagon/subinsn_*_decode_generated
199     <BUILD_DIR>/target/hexagon/decode_*_generated.c.inc
200 Step 4 is to import iset.py into target/hexagon/gen_trans_funcs.py to produce
201     <BUILD_DIR>/target/hexagon/decodetree_trans_funcs_generated.c.inc
214 The Hexagon arch lib relies heavily on macros for the instruction semantics.
276 For Hexagon Vector eXtensions (HVX), the following fields are used
289 To track down nasty issues with Hexagon->TCG generation, we compare the
290 execution results with actual hardware running on a Hexagon Linux target.