Lines Matching +full:irqs +full:- +full:reserved
4 * Copyright (c) 2023-2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
5 * Copyright (c) 2023-2024 Inès Varhol <ines.varhol@telecom-paris.fr>
7 * SPDX-License-Identifier: GPL-2.0-or-later
10 * See the COPYING file in the top-level directory.
20 * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
21 * https://www.st.com/en/microcontrollers-microprocessors/stm32l4x5/documentation.html
27 #include "exec/address-spaces.h"
29 #include "hw/or-irq.h"
33 #include "hw/qdev-clock.h"
49 * Some IRQs are connected to the same CPU IRQ (denoted by -1)
58 -1, -1, -1, -1, -1, /* GPIO[5..9] OR gate 23 */
59 -1, -1, -1, -1, -1, -1, /* GPIO[10..15] OR gate 40 */
60 -1, /* PVD OR gate 1 */
65 -1, -1, /* COMP[1..2] OR gate 63 */
78 -1, -1, -1, -1, /* PVM[1..4] OR gate 1 */
102 /* 1 OR gate with non-consecutive inputs */
140 object_initialize_child(obj, "exti", &s->exti, TYPE_STM32L4X5_EXTI); in stm32l4x5_soc_initfn()
142 object_initialize_child(obj, "exti_or_gates[*]", &s->exti_or_gates[i], in stm32l4x5_soc_initfn()
145 object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG); in stm32l4x5_soc_initfn()
146 object_initialize_child(obj, "rcc", &s->rcc, TYPE_STM32L4X5_RCC); in stm32l4x5_soc_initfn()
150 object_initialize_child(obj, name, &s->gpio[i], TYPE_STM32L4X5_GPIO); in stm32l4x5_soc_initfn()
154 object_initialize_child(obj, "usart[*]", &s->usart[i], in stm32l4x5_soc_initfn()
159 object_initialize_child(obj, "uart[*]", &s->uart[i], in stm32l4x5_soc_initfn()
162 object_initialize_child(obj, "lpuart1", &s->lpuart, in stm32l4x5_soc_initfn()
176 if (!memory_region_init_rom(&s->flash, OBJECT(dev_soc), "flash", in stm32l4x5_soc_realize()
177 sc->flash_size, errp)) { in stm32l4x5_soc_realize()
180 memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), in stm32l4x5_soc_realize()
181 "flash_boot_alias", &s->flash, 0, in stm32l4x5_soc_realize()
182 sc->flash_size); in stm32l4x5_soc_realize()
184 memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); in stm32l4x5_soc_realize()
185 memory_region_add_subregion(system_memory, 0, &s->flash_alias); in stm32l4x5_soc_realize()
187 if (!memory_region_init_ram(&s->sram1, OBJECT(dev_soc), "SRAM1", SRAM1_SIZE, in stm32l4x5_soc_realize()
191 memory_region_add_subregion(system_memory, SRAM1_BASE_ADDRESS, &s->sram1); in stm32l4x5_soc_realize()
193 if (!memory_region_init_ram(&s->sram2, OBJECT(dev_soc), "SRAM2", SRAM2_SIZE, in stm32l4x5_soc_realize()
197 memory_region_add_subregion(system_memory, SRAM2_BASE_ADDRESS, &s->sram2); in stm32l4x5_soc_realize()
199 object_initialize_child(OBJECT(dev_soc), "armv7m", &s->armv7m, TYPE_ARMV7M); in stm32l4x5_soc_realize()
200 armv7m = DEVICE(&s->armv7m); in stm32l4x5_soc_realize()
201 qdev_prop_set_uint32(armv7m, "num-irq", 96); in stm32l4x5_soc_realize()
202 qdev_prop_set_uint32(armv7m, "num-prio-bits", 4); in stm32l4x5_soc_realize()
203 qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); in stm32l4x5_soc_realize()
204 qdev_prop_set_bit(armv7m, "enable-bitband", true); in stm32l4x5_soc_realize()
206 qdev_get_clock_out(DEVICE(&(s->rcc)), "cortex-fclk-out")); in stm32l4x5_soc_realize()
208 qdev_get_clock_out(DEVICE(&(s->rcc)), "cortex-refclk-out")); in stm32l4x5_soc_realize()
209 object_property_set_link(OBJECT(&s->armv7m), "memory", in stm32l4x5_soc_realize()
211 if (!sysbus_realize(SYS_BUS_DEVICE(&s->armv7m), errp)) { in stm32l4x5_soc_realize()
218 dev = DEVICE(&s->gpio[i]); in stm32l4x5_soc_realize()
220 qdev_prop_set_uint32(dev, "mode-reset", in stm32l4x5_soc_realize()
222 qdev_prop_set_uint32(dev, "ospeed-reset", in stm32l4x5_soc_realize()
224 qdev_prop_set_uint32(dev, "pupd-reset", in stm32l4x5_soc_realize()
226 busdev = SYS_BUS_DEVICE(&s->gpio[i]); in stm32l4x5_soc_realize()
228 name = g_strdup_printf("gpio%c-out", 'a' + i); in stm32l4x5_soc_realize()
229 qdev_connect_clock_in(DEVICE(&s->gpio[i]), "clk", in stm32l4x5_soc_realize()
230 qdev_get_clock_out(DEVICE(&(s->rcc)), name)); in stm32l4x5_soc_realize()
238 busdev = SYS_BUS_DEVICE(&s->syscfg); in stm32l4x5_soc_realize()
239 qdev_connect_clock_in(DEVICE(&s->syscfg), "clk", in stm32l4x5_soc_realize()
240 qdev_get_clock_out(DEVICE(&(s->rcc)), "syscfg-out")); in stm32l4x5_soc_realize()
249 qdev_connect_gpio_out(DEVICE(&s->gpio[i]), j, in stm32l4x5_soc_realize()
250 qdev_get_gpio_in(DEVICE(&s->syscfg), in stm32l4x5_soc_realize()
255 qdev_pass_gpios(DEVICE(&s->syscfg), dev_soc, NULL); in stm32l4x5_soc_realize()
258 busdev = SYS_BUS_DEVICE(&s->exti); in stm32l4x5_soc_realize()
264 /* IRQs with fan-in that require an OR gate */ in stm32l4x5_soc_realize()
266 if (!object_property_set_int(OBJECT(&s->exti_or_gates[i]), "num-lines", in stm32l4x5_soc_realize()
270 if (!qdev_realize(DEVICE(&s->exti_or_gates[i]), NULL, errp)) { in stm32l4x5_soc_realize()
274 qdev_connect_gpio_out(DEVICE(&s->exti_or_gates[i]), 0, in stm32l4x5_soc_realize()
280 sysbus_connect_irq(SYS_BUS_DEVICE(&s->exti), in stm32l4x5_soc_realize()
282 qdev_get_gpio_in(DEVICE(&s->exti_or_gates[i]), j)); in stm32l4x5_soc_realize()
285 /* non-consecutive inputs for OR gate 1 */ in stm32l4x5_soc_realize()
287 sysbus_connect_irq(SYS_BUS_DEVICE(&s->exti), in stm32l4x5_soc_realize()
289 qdev_get_gpio_in(DEVICE(&s->exti_or_gates[i]), j)); in stm32l4x5_soc_realize()
294 /* IRQs that don't require fan-in */ in stm32l4x5_soc_realize()
296 if (exti_irq[i] != -1) { in stm32l4x5_soc_realize()
304 qdev_connect_gpio_out(DEVICE(&s->syscfg), i, in stm32l4x5_soc_realize()
305 qdev_get_gpio_in(DEVICE(&s->exti), i)); in stm32l4x5_soc_realize()
309 busdev = SYS_BUS_DEVICE(&s->rcc); in stm32l4x5_soc_realize()
318 g_autofree char *name = g_strdup_printf("usart%d-out", i + 1); in stm32l4x5_soc_realize()
319 dev = DEVICE(&(s->usart[i])); in stm32l4x5_soc_realize()
322 qdev_get_clock_out(DEVICE(&(s->rcc)), name)); in stm32l4x5_soc_realize()
328 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(&s->exti), in stm32l4x5_soc_realize()
334 g_autofree char *name = g_strdup_printf("uart%d-out", STM_NUM_USARTS + i + 1); in stm32l4x5_soc_realize()
335 dev = DEVICE(&(s->uart[i])); in stm32l4x5_soc_realize()
338 qdev_get_clock_out(DEVICE(&(s->rcc)), name)); in stm32l4x5_soc_realize()
344 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(&s->exti), in stm32l4x5_soc_realize()
349 dev = DEVICE(&(s->lpuart)); in stm32l4x5_soc_realize()
352 qdev_get_clock_out(DEVICE(&(s->rcc)), "lpuart1-out")); in stm32l4x5_soc_realize()
358 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(&s->exti), in stm32l4x5_soc_realize()
368 /* RESERVED: 0x40001800, 0x1000 */ in stm32l4x5_soc_realize()
372 /* RESERVED: 0x40001800, 0x400 */ in stm32l4x5_soc_realize()
375 /* RESERVED: 0x40004000, 0x400 */ in stm32l4x5_soc_realize()
379 /* RESERVED: 0x40006000, 0x400 */ in stm32l4x5_soc_realize()
381 /* RESERVED: 0x40006800, 0x400 */ in stm32l4x5_soc_realize()
386 /* RESERVED: 0x40008400, 0x400 */ in stm32l4x5_soc_realize()
388 /* RESERVED: 0x40008C00, 0x800 */ in stm32l4x5_soc_realize()
390 /* RESERVED: 0x40009800, 0x6800 */ in stm32l4x5_soc_realize()
395 /* RESERVED: 0x40010800, 0x1400 */ in stm32l4x5_soc_realize()
397 /* RESERVED: 0x40012000, 0x800 */ in stm32l4x5_soc_realize()
402 /* RESERVED: 0x40013C00, 0x400 */ in stm32l4x5_soc_realize()
406 /* RESERVED: 0x40014C00, 0x800 */ in stm32l4x5_soc_realize()
409 /* RESERVED: 0x40015C00, 0x400 */ in stm32l4x5_soc_realize()
411 /* RESERVED: 0x40016400, 0x9C00 */ in stm32l4x5_soc_realize()
416 /* RESERVED: 0x40020800, 0x800 */ in stm32l4x5_soc_realize()
417 /* RESERVED: 0x40021400, 0xC00 */ in stm32l4x5_soc_realize()
419 /* RESERVED: 0x40022400, 0xC00 */ in stm32l4x5_soc_realize()
421 /* RESERVED: 0x40023400, 0x400 */ in stm32l4x5_soc_realize()
424 /* RESERVED: 0x40024400, 0x7FDBC00 */ in stm32l4x5_soc_realize()
427 /* RESERVED: 0x48002000, 0x7FDBC00 */ in stm32l4x5_soc_realize()
430 /* RESERVED: 0x50040400, 0x20400 */ in stm32l4x5_soc_realize()
443 dc->realize = stm32l4x5_soc_realize; in stm32l4x5_soc_class_init()
445 dc->user_creatable = false; in stm32l4x5_soc_class_init()
453 ssc->flash_size = 256 * KiB; in stm32l4x5xc_soc_class_init()
460 ssc->flash_size = 512 * KiB; in stm32l4x5xe_soc_class_init()
467 ssc->flash_size = 1 * MiB; in stm32l4x5xg_soc_class_init()