system/arm/aspeed.rst

1 …-evb``, ``ast2600-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``gb200nvl-bmc``, ``fby35-bmc``, ``fp528…
6 Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
8 with dual cores ARM Cortex-A7 CPUs (1.2GHz).
15 - ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
16 - ``quanta-q71l-bmc``      OpenBMC Quanta BMC
17 - ``supermicrox11-bmc``    Supermicro X11 BMC (ARM926EJ-S)
18 - ``supermicrox11spi-bmc``    Supermicro X11 SPI BMC (ARM1176)
22 - ``ast2500-evb``          Aspeed AST2500 Evaluation board
23 - ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
24 - ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
25 - ``sonorapass-bmc``       OCP SonoraPass BMC
26 - ``fp5280g2-bmc``         Inspur FP5280G2 BMC
27 - ``g220a-bmc``            Bytedance G220A BMC
28 - ``yosemitev2-bmc``       Facebook YosemiteV2 BMC
29 - ``tiogapass-bmc``        Facebook Tiogapass BMC
33 - ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex-A7)
34 - ``rainier-bmc``          IBM Rainier POWER10 BMC
35 - ``fuji-bmc``             Facebook Fuji BMC
36 - ``bletchley-bmc``        Facebook Bletchley BMC
37 - ``fby35-bmc``            Facebook fby35 BMC
38 - ``gb200nvl-bmc``         Nvidia GB200nvl BMC
39 - ``qcom-dc-scm-v1-bmc``   Qualcomm DC-SCM V1 BMC
40 - ``qcom-firework-bmc``    Qualcomm Firework BMC
43 -----------------
45  * SMP (for the AST2600 Cortex-A7)
52  * X-DMA Controller (basic interface)
53  * Static Memory Controller (SMC or FMC) - Only SPI Flash support
64  * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
74 ---------------
80  * PCI-Express 1 Controller
88 ------------
90 The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
94    https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
102    https://github.com/AspeedTech-BMC/openbmc/releases
109 .. code-block:: bash
111   $ qemu-system-arm -M ast2600-evb -nographic \
112         -kernel arch/arm/boot/zImage \
113         -dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
114         -initrd rootfs.cpio
121  * ``execute-in-place`` which emulates the boot from the CE0 flash
125  * ``fmc-model`` to change the default FMC Flash model. FW needs
128  * ``spi-model`` to change the default SPI Flash model.
132 .. code-block:: bash
134   $ qemu-system-arm -M romulus-bmc -nic user \
135 	-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
138 bigger (64M) SPI for the ``ast2500-evb`` machine, run :
140 .. code-block:: bash
142   -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
146 ``-nodefaults`` QEMU option can be used to avoid creating the default
152 .. code-block:: bash
154   $ qemu-system-arm -M ast2600-evb \
155         -blockdev node-name=fmc0,driver=file,filename=/path/to/fmc0.img \
156 	-device mx66u51235f,bus=ssi.0,cs=0x0,drive=fmc0 \
157 	-blockdev node-name=fmc1,driver=file,filename=/path/to/fmc1.img \
158 	-device mx66u51235f,bus=ssi.0,cs=0x1,drive=fmc1 \
159 	-blockdev node-name=spi1,driver=file,filename=/path/to/spi1.img \
160 	-device mx66u51235f,cs=0x0,bus=ssi.1,drive=spi1 \
161 	-nographic -nodefaults
165 machine option ``execute-in-place`` has a similar effect.
173  * ``boot-emmc`` to set or unset boot from eMMC (AST2600).
175 Only the ``ast2600-evb`` and ``rainier-emmc`` machines have support to
180 .. code-block:: bash
182    $ dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M
183    $ dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc
184    $ dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K
185    $ cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img
186    $ truncate --size 16GB mmc.img
188 Boot the machine ``rainier-emmc`` with :
190 .. code-block:: bash
192    $ qemu-system-arm -M rainier-bmc \
193          -drive file=mmc.img,format=raw,if=sd,index=2 \
194          -nographic
196 The ``boot-emmc`` option can be set or unset, to change the default
198 ``ast2600-evb`` machine from an eMMC device (default being SPI) or to
199 boot the ``rainier-bmc`` machine from a flash device (default being
202 As an example, here is how to to boot the ``rainier-bmc`` machine from
203 the flash device with ``boot-emmc=false`` and let the machine use an
206 .. code-block:: bash
208    $ qemu-system-arm -M rainier-bmc,boot-emmc=false \
209         -drive file=flash.img,format=raw,if=mtd \
210         -drive file=mmc.img,format=raw,if=sd,index=2 \
211         -nographic
215 machine.  This limitation is due to the use of the ``-drive``
221 .. code-block:: bash
223    -blockdev node-name=emmc0,driver=file,filename=mmc.img \
224    -device emmc,bus=sdhci-bus.2,drive=emmc0,boot-partition-size=1048576,boot-config=8
226 This is not yet supported (as of QEMU-10.0). Work is needed to
234  * ``bmc-console`` to change the default console device. Most of the
242 .. code-block:: bash
244   -M ast2500-evb,bmc-console=uart3
251 and storing user-programmable data. This OTP memory module is managed
255   * When the options are specified, the pre-generated configuration
261 .. code-block:: bash
263   -blockdev driver=file,filename=otpmem.img,node-name=otp \
264   -global aspeed-otp.drive=otp \
269 .. code-block:: bash
271   if [ ! -f otpmem.img ]; then
277 Aspeed 2700 family boards (``ast2700-evb``, ``ast2700fc``)
282 the AST2700 with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz).
289 - ``ast2700-evb``          Aspeed AST2700 Evaluation board (Cortex-A35)
290 - ``ast2700fc``            Aspeed AST2700 Evaluation board (Cortex-A35 + Cortex-M4)
293 -----------------
300  * X-DMA Controller (basic interface)
301  * Static Memory Controller (SMC or FMC) - Only SPI Flash support
312  * Hash/Crypto Engine (HACE) - Hash support only. TODO: Crypto
320 ---------------
324  * PCI-Express 1 Controller
332 ------------
336    https://github.com/AspeedTech-BMC/openbmc/releases
338 Booting the ast2700-evb machine
345 Manual boot using ``-device loader``:
350 .. code-block:: bash
352   IMGDIR=ast2700-default
353   UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin)
355   $ qemu-system-aarch64 -M ast2700-evb \
356        -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \
357        -device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \
358        -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \
359        -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \
360        -device loader,cpu-num=0,addr=0x430000000 \
361        -device loader,cpu-num=1,addr=0x430000000 \
362        -device loader,cpu-num=2,addr=0x430000000 \
363        -device loader,cpu-num=3,addr=0x430000000 \
364        -smp 4 \
365        -drive file=${IMGDIR}/image-bmc,format=raw,if=mtd \
366        -nographic
368 Boot using a virtual boot ROM (``-bios``):
370 If users do not specify the ``-bios option``, QEMU will attempt to load the
372 directory or the ``pc-bios`` directory within the QEMU source tree.
374 .. code-block:: bash
376   $ qemu-system-aarch64 -M ast2700-evb \
377       -drive file=image-bmc,format=raw,if=mtd \
378       -nographic
380 The ``-bios`` option allows users to specify a custom path for the vbootrom
384 .. code-block:: bash
386   -bios ${HOME}/ast27x0_bootrom.bin
391 AST2700 features four Cortex-A35 primary processors and two Cortex-M4 coprocessors.
392 **ast2700-evb** machine focuses on emulating the four Cortex-A35 primary processors,
393 **ast2700fc** machine extends **ast2700-evb** by adding support for the two Cortex-M4 coprocessors.
396 Manual boot using ``-device loader``:
400 firmware. The SSP and TSP start in the powered-off state and must be explicitly enabled by the
407  * u-boot-nodtb.bin
408  * u-boot.dtb
410  * optee/tee-raw.bin
411  * image-bmc
412  * zephyr-aspeed-ssp.bin (for SSP firmware, CPU 5)
413  * zephyr-aspeed-tsp.bin (for TSP firmware, CPU 6)
417 .. code-block:: bash
419   IMGDIR=ast2700-default
420   UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin)
422   $ qemu-system-aarch64 -M ast2700fc \
423        -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \
424        -device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \
425        -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \
426        -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \
427        -device loader,addr=0x42C000000,file=${IMGDIR}/zephyr-aspeed-ssp.bin,force-raw=on \
428        -device loader,addr=0x42E000000,file=${IMGDIR}/zephyr-aspeed-tsp.bin,force-raw=on \
429        -device loader,cpu-num=0,addr=0x430000000 \
430        -device loader,cpu-num=1,addr=0x430000000 \
431        -device loader,cpu-num=2,addr=0x430000000 \
432        -device loader,cpu-num=3,addr=0x430000000 \
433        -drive file=${IMGDIR}/image-bmc,if=mtd,format=raw \
434        -serial pty -serial pty -serial pty \
435        -snapshot \
436        -S -nographic
438 Boot using a virtual boot ROM (-bios):
446 .. code-block:: bash
448   IMGDIR=ast2700-default
450   $ qemu-system-aarch64 -M ast2700fc \
451       -bios ast27x0_bootrom.bin \
452       -drive file=${IMGDIR}/image-bmc,if=mtd,format=raw \
453       -serial pty -serial pty -serial pty \
454       -snapshot \
455       -S -nographic
462 .. code-block:: bash
468 - serial0: Console for the four Cortex-A35 primary processors.
469 - serial1 and serial2: Consoles for the two Cortex-M4 coprocessors.
473 .. code-block:: bash
480 Aspeed minibmc family boards (``ast1030-evb``)
485 Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
491 - ``ast1030-evb``          Aspeed AST1030 Evaluation board (Cortex-M4F)
494 -----------------
496  * SMP (for the AST1030 Cortex-M4F)
502  * Static Memory Controller (SMC or FMC) - Only SPI Flash support
509  * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
516 ---------------
526 ------------
528 The Aspeed machines can be started using the ``-kernel`` to load a
532    https://github.com/AspeedTech-BMC/zephyr/releases
536 .. code-block:: bash
538   $ qemu-system-arm -M ast1030-evb -nographic \
539         -kernel zephyr.elf