195 	const struct dwmac4_addrs *default_addrs = NULL;  in _dwmac4_dump_dma_regs()  local
200 	reg_space[DMA_CHAN_CONTROL(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
202 	reg_space[DMA_CHAN_TX_CONTROL(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
204 	reg_space[DMA_CHAN_RX_CONTROL(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
206 	reg_space[DMA_CHAN_TX_BASE_ADDR(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
208 	reg_space[DMA_CHAN_RX_BASE_ADDR(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
210 	reg_space[DMA_CHAN_TX_END_ADDR(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
212 	reg_space[DMA_CHAN_RX_END_ADDR(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
214 	reg_space[DMA_CHAN_TX_RING_LEN(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
216 	reg_space[DMA_CHAN_RX_RING_LEN(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
218 	reg_space[DMA_CHAN_INTR_ENA(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
220 	reg_space[DMA_CHAN_RX_WATCHDOG(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
222 	reg_space[DMA_CHAN_SLOT_CTRL_STATUS(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
224 	reg_space[DMA_CHAN_CUR_TX_DESC(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
226 	reg_space[DMA_CHAN_CUR_RX_DESC(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
228 	reg_space[DMA_CHAN_CUR_TX_BUF_ADDR(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
230 	reg_space[DMA_CHAN_CUR_RX_BUF_ADDR(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()
232 	reg_space[DMA_CHAN_STATUS(default_addrs, channel) / 4] =  in _dwmac4_dump_dma_regs()