Lines Matching +full:mac +full:- +full:clk +full:- +full:tx
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
11 #include <linux/clk.h>
12 #include <linux/dma-mapping.h>
47 /* Min number of tx ring entries before stopping queue */
66 /* Tx ring */
90 struct clk *clk; member
93 struct clk *rclk;
116 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
122 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
134 return -EIO; in ftgmac100_reset_mac()
141 switch (priv->cur_speed) { in ftgmac100_reset_and_config_mac()
154 netdev_err(priv->netdev, "Unknown speed %d !\n", in ftgmac100_reset_and_config_mac()
155 priv->cur_speed); in ftgmac100_reset_and_config_mac()
160 priv->rx_pointer = 0; in ftgmac100_reset_and_config_mac()
161 priv->tx_clean_pointer = 0; in ftgmac100_reset_and_config_mac()
162 priv->tx_pointer = 0; in ftgmac100_reset_and_config_mac()
166 return -EIO; in ftgmac100_reset_and_config_mac()
171 static void ftgmac100_write_mac_addr(struct ftgmac100 *priv, const u8 *mac) in ftgmac100_write_mac_addr() argument
173 unsigned int maddr = mac[0] << 8 | mac[1]; in ftgmac100_write_mac_addr()
174 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; in ftgmac100_write_mac_addr()
176 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR); in ftgmac100_write_mac_addr()
177 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR); in ftgmac100_write_mac_addr()
182 u8 mac[ETH_ALEN]; in ftgmac100_initial_mac() local
187 err = of_get_ethdev_address(priv->dev->of_node, priv->netdev); in ftgmac100_initial_mac()
188 if (err == -EPROBE_DEFER) in ftgmac100_initial_mac()
191 dev_info(priv->dev, "Read MAC address %pM from device tree\n", in ftgmac100_initial_mac()
192 priv->netdev->dev_addr); in ftgmac100_initial_mac()
196 m = ioread32(priv->base + FTGMAC100_OFFSET_MAC_MADR); in ftgmac100_initial_mac()
197 l = ioread32(priv->base + FTGMAC100_OFFSET_MAC_LADR); in ftgmac100_initial_mac()
199 mac[0] = (m >> 8) & 0xff; in ftgmac100_initial_mac()
200 mac[1] = m & 0xff; in ftgmac100_initial_mac()
201 mac[2] = (l >> 24) & 0xff; in ftgmac100_initial_mac()
202 mac[3] = (l >> 16) & 0xff; in ftgmac100_initial_mac()
203 mac[4] = (l >> 8) & 0xff; in ftgmac100_initial_mac()
204 mac[5] = l & 0xff; in ftgmac100_initial_mac()
206 if (is_valid_ether_addr(mac)) { in ftgmac100_initial_mac()
207 eth_hw_addr_set(priv->netdev, mac); in ftgmac100_initial_mac()
208 dev_info(priv->dev, "Read MAC address %pM from chip\n", mac); in ftgmac100_initial_mac()
210 eth_hw_addr_random(priv->netdev); in ftgmac100_initial_mac()
211 dev_info(priv->dev, "Generated random MAC address %pM\n", in ftgmac100_initial_mac()
212 priv->netdev->dev_addr); in ftgmac100_initial_mac()
227 ftgmac100_write_mac_addr(netdev_priv(dev), dev->dev_addr); in ftgmac100_set_mac_addr()
236 /* Throttle tx queue when receiving pause frames */ in ftgmac100_config_pause()
237 if (priv->rx_pause) in ftgmac100_config_pause()
243 if (priv->tx_pause) in ftgmac100_config_pause()
246 iowrite32(fcr, priv->base + FTGMAC100_OFFSET_FCR); in ftgmac100_config_pause()
254 reg = ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_init_hw()
255 iowrite32(reg, priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_init_hw()
258 iowrite32(priv->rxdes_dma, priv->base + FTGMAC100_OFFSET_RXR_BADR); in ftgmac100_init_hw()
260 /* Setup TX ring buffer base */ in ftgmac100_init_hw()
261 iowrite32(priv->txdes_dma, priv->base + FTGMAC100_OFFSET_NPTXR_BADR); in ftgmac100_init_hw()
265 priv->base + FTGMAC100_OFFSET_RBSR); in ftgmac100_init_hw()
269 priv->base + FTGMAC100_OFFSET_APTC); in ftgmac100_init_hw()
271 /* Write MAC address */ in ftgmac100_init_hw()
272 ftgmac100_write_mac_addr(priv, priv->netdev->dev_addr); in ftgmac100_init_hw()
275 iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0); in ftgmac100_init_hw()
276 iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1); in ftgmac100_init_hw()
284 FTGMAC100_DBLAC_TXDES_SIZE(2) | /* 2*8 bytes TX descs */ in ftgmac100_init_hw()
286 FTGMAC100_DBLAC_TXBURST_SIZE(3) | /* 512 bytes max TX bursts */ in ftgmac100_init_hw()
290 priv->base + FTGMAC100_OFFSET_DBLAC); in ftgmac100_init_hw()
298 priv->base + FTGMAC100_OFFSET_ITC); in ftgmac100_init_hw()
301 reg = ioread32(priv->base + FTGMAC100_OFFSET_FEAR); in ftgmac100_init_hw()
304 reg = ioread32(priv->base + FTGMAC100_OFFSET_TPAFCR); in ftgmac100_init_hw()
308 iowrite32(reg, priv->base + FTGMAC100_OFFSET_TPAFCR); in ftgmac100_init_hw()
313 u32 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_start_hw()
329 if (priv->cur_duplex == DUPLEX_FULL) in ftgmac100_start_hw()
331 if (priv->netdev->flags & IFF_PROMISC) in ftgmac100_start_hw()
333 if (priv->netdev->flags & IFF_ALLMULTI) in ftgmac100_start_hw()
335 else if (netdev_mc_count(priv->netdev)) in ftgmac100_start_hw()
339 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) in ftgmac100_start_hw()
343 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_start_hw()
348 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_stop_hw()
355 priv->maht1 = 0; in ftgmac100_calc_mc_hash()
356 priv->maht0 = 0; in ftgmac100_calc_mc_hash()
357 netdev_for_each_mc_addr(ha, priv->netdev) { in ftgmac100_calc_mc_hash()
358 u32 crc_val = ether_crc_le(ETH_ALEN, ha->addr); in ftgmac100_calc_mc_hash()
362 priv->maht1 |= 1ul << (crc_val - 32); in ftgmac100_calc_mc_hash()
364 priv->maht0 |= 1ul << (crc_val); in ftgmac100_calc_mc_hash()
380 iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0); in ftgmac100_set_rx_mode()
381 iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1); in ftgmac100_set_rx_mode()
390 struct net_device *netdev = priv->netdev; in ftgmac100_alloc_rx_buf()
399 err = -ENOMEM; in ftgmac100_alloc_rx_buf()
400 map = priv->rx_scratch_dma; in ftgmac100_alloc_rx_buf()
402 map = dma_map_single(priv->dev, skb->data, RX_BUF_SIZE, in ftgmac100_alloc_rx_buf()
404 if (unlikely(dma_mapping_error(priv->dev, map))) { in ftgmac100_alloc_rx_buf()
408 map = priv->rx_scratch_dma; in ftgmac100_alloc_rx_buf()
410 err = -ENOMEM; in ftgmac100_alloc_rx_buf()
415 priv->rx_skbs[entry] = skb; in ftgmac100_alloc_rx_buf()
418 rxdes->rxdes3 = cpu_to_le32(map); in ftgmac100_alloc_rx_buf()
424 if (entry == (priv->rx_q_entries - 1)) in ftgmac100_alloc_rx_buf()
425 rxdes->rxdes0 = cpu_to_le32(priv->rxdes0_edorr_mask); in ftgmac100_alloc_rx_buf()
427 rxdes->rxdes0 = 0; in ftgmac100_alloc_rx_buf()
435 return (pointer + 1) & (priv->rx_q_entries - 1); in ftgmac100_next_rx_pointer()
440 struct net_device *netdev = priv->netdev; in ftgmac100_rx_packet_error()
443 netdev->stats.rx_errors++; in ftgmac100_rx_packet_error()
446 netdev->stats.rx_crc_errors++; in ftgmac100_rx_packet_error()
451 netdev->stats.rx_length_errors++; in ftgmac100_rx_packet_error()
456 struct net_device *netdev = priv->netdev; in ftgmac100_rx_packet()
464 pointer = priv->rx_pointer; in ftgmac100_rx_packet()
465 rxdes = &priv->rxdes[pointer]; in ftgmac100_rx_packet()
468 status = le32_to_cpu(rxdes->rxdes0); in ftgmac100_rx_packet()
484 csum_vlan = le32_to_cpu(rxdes->rxdes1); in ftgmac100_rx_packet()
508 skb = priv->rx_skbs[pointer]; in ftgmac100_rx_packet()
515 netdev->stats.multicast++; in ftgmac100_rx_packet()
523 if (netdev->features & NETIF_F_RXCSUM) { in ftgmac100_rx_packet()
529 skb->ip_summed = CHECKSUM_NONE; in ftgmac100_rx_packet()
531 skb->ip_summed = CHECKSUM_UNNECESSARY; in ftgmac100_rx_packet()
538 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && in ftgmac100_rx_packet()
544 map = le32_to_cpu(rxdes->rxdes3); in ftgmac100_rx_packet()
551 dma_unmap_single(priv->dev, map, size, DMA_FROM_DEVICE); in ftgmac100_rx_packet()
553 dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); in ftgmac100_rx_packet()
559 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer); in ftgmac100_rx_packet()
561 skb->protocol = eth_type_trans(skb, netdev); in ftgmac100_rx_packet()
563 netdev->stats.rx_packets++; in ftgmac100_rx_packet()
564 netdev->stats.rx_bytes += size; in ftgmac100_rx_packet()
567 if (skb->ip_summed == CHECKSUM_NONE) in ftgmac100_rx_packet()
570 napi_gro_receive(&priv->napi, skb); in ftgmac100_rx_packet()
577 rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask); in ftgmac100_rx_packet()
578 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer); in ftgmac100_rx_packet()
579 netdev->stats.rx_dropped++; in ftgmac100_rx_packet()
586 if (index == (priv->tx_q_entries - 1)) in ftgmac100_base_tx_ctlstat()
587 return priv->txdes0_edotr_mask; in ftgmac100_base_tx_ctlstat()
595 return (pointer + 1) & (priv->tx_q_entries - 1); in ftgmac100_next_tx_pointer()
600 /* Returns the number of available slots in the TX queue in ftgmac100_tx_buf_avail()
606 return (priv->tx_clean_pointer - priv->tx_pointer - 1) & in ftgmac100_tx_buf_avail()
607 (priv->tx_q_entries - 1); in ftgmac100_tx_buf_avail()
612 return priv->tx_pointer != priv->tx_clean_pointer; in ftgmac100_tx_buf_cleanable()
621 dma_addr_t map = le32_to_cpu(txdes->txdes3); in ftgmac100_free_tx_packet()
626 dma_unmap_single(priv->dev, map, len, DMA_TO_DEVICE); in ftgmac100_free_tx_packet()
629 dma_unmap_page(priv->dev, map, len, DMA_TO_DEVICE); in ftgmac100_free_tx_packet()
635 priv->tx_skbs[pointer] = NULL; in ftgmac100_free_tx_packet()
640 struct net_device *netdev = priv->netdev; in ftgmac100_tx_complete_packet()
646 pointer = priv->tx_clean_pointer; in ftgmac100_tx_complete_packet()
647 txdes = &priv->txdes[pointer]; in ftgmac100_tx_complete_packet()
649 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_tx_complete_packet()
653 skb = priv->tx_skbs[pointer]; in ftgmac100_tx_complete_packet()
654 netdev->stats.tx_packets++; in ftgmac100_tx_complete_packet()
655 netdev->stats.tx_bytes += skb->len; in ftgmac100_tx_complete_packet()
657 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_tx_complete_packet()
659 /* Ensure the descriptor config is visible before setting the tx in ftgmac100_tx_complete_packet()
664 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv, pointer); in ftgmac100_tx_complete_packet()
671 struct net_device *netdev = priv->netdev; in ftgmac100_tx_complete()
695 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { in ftgmac100_prep_tx_csum()
696 u8 ip_proto = ip_hdr(skb)->protocol; in ftgmac100_prep_tx_csum()
724 netdev->stats.tx_dropped++; in ftgmac100_hard_start_xmit()
729 if (unlikely(skb->len > MAX_PKT_SIZE)) { in ftgmac100_hard_start_xmit()
731 netdev_dbg(netdev, "tx packet too big\n"); in ftgmac100_hard_start_xmit()
738 nfrags = skb_shinfo(skb)->nr_frags; in ftgmac100_hard_start_xmit()
742 if (skb->ip_summed == CHECKSUM_PARTIAL && in ftgmac100_hard_start_xmit()
756 map = dma_map_single(priv->dev, skb->data, len, DMA_TO_DEVICE); in ftgmac100_hard_start_xmit()
757 if (dma_mapping_error(priv->dev, map)) { in ftgmac100_hard_start_xmit()
759 netdev_err(netdev, "map tx packet head failed\n"); in ftgmac100_hard_start_xmit()
763 /* Grab the next free tx descriptor */ in ftgmac100_hard_start_xmit()
764 pointer = priv->tx_pointer; in ftgmac100_hard_start_xmit()
765 txdes = first = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
770 priv->tx_skbs[pointer] = skb; in ftgmac100_hard_start_xmit()
777 txdes->txdes3 = cpu_to_le32(map); in ftgmac100_hard_start_xmit()
778 txdes->txdes1 = cpu_to_le32(csum_vlan); in ftgmac100_hard_start_xmit()
785 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in ftgmac100_hard_start_xmit()
790 map = skb_frag_dma_map(priv->dev, frag, 0, len, in ftgmac100_hard_start_xmit()
792 if (dma_mapping_error(priv->dev, map)) in ftgmac100_hard_start_xmit()
796 priv->tx_skbs[pointer] = skb; in ftgmac100_hard_start_xmit()
797 txdes = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
801 if (i == (nfrags - 1)) in ftgmac100_hard_start_xmit()
803 txdes->txdes0 = cpu_to_le32(ctl_stat); in ftgmac100_hard_start_xmit()
804 txdes->txdes1 = 0; in ftgmac100_hard_start_xmit()
805 txdes->txdes3 = cpu_to_le32(map); in ftgmac100_hard_start_xmit()
815 first->txdes0 = cpu_to_le32(f_ctl_stat); in ftgmac100_hard_start_xmit()
817 /* Ensure the descriptor config is visible before setting the tx in ftgmac100_hard_start_xmit()
822 /* Update next TX pointer */ in ftgmac100_hard_start_xmit()
823 priv->tx_pointer = pointer; in ftgmac100_hard_start_xmit()
826 * in the TX ring, stop the queue. The sequence below is race free in ftgmac100_hard_start_xmit()
837 /* Poke transmitter to read the updated TX descriptors */ in ftgmac100_hard_start_xmit()
838 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD); in ftgmac100_hard_start_xmit()
844 netdev_err(netdev, "map tx fragment failed\n"); in ftgmac100_hard_start_xmit()
847 pointer = priv->tx_pointer; in ftgmac100_hard_start_xmit()
849 first->txdes0 = cpu_to_le32(f_ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()
854 txdes = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
855 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_hard_start_xmit()
857 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()
867 netdev->stats.tx_dropped++; in ftgmac100_hard_start_xmit()
877 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_free_buffers()
878 struct ftgmac100_rxdes *rxdes = &priv->rxdes[i]; in ftgmac100_free_buffers()
879 struct sk_buff *skb = priv->rx_skbs[i]; in ftgmac100_free_buffers()
880 dma_addr_t map = le32_to_cpu(rxdes->rxdes3); in ftgmac100_free_buffers()
885 priv->rx_skbs[i] = NULL; in ftgmac100_free_buffers()
886 dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); in ftgmac100_free_buffers()
890 /* Free all TX buffers */ in ftgmac100_free_buffers()
891 for (i = 0; i < priv->tx_q_entries; i++) { in ftgmac100_free_buffers()
892 struct ftgmac100_txdes *txdes = &priv->txdes[i]; in ftgmac100_free_buffers()
893 struct sk_buff *skb = priv->tx_skbs[i]; in ftgmac100_free_buffers()
898 le32_to_cpu(txdes->txdes0)); in ftgmac100_free_buffers()
905 kfree(priv->rx_skbs); in ftgmac100_free_rings()
906 kfree(priv->tx_skbs); in ftgmac100_free_rings()
909 if (priv->rxdes) in ftgmac100_free_rings()
910 dma_free_coherent(priv->dev, MAX_RX_QUEUE_ENTRIES * in ftgmac100_free_rings()
912 priv->rxdes, priv->rxdes_dma); in ftgmac100_free_rings()
913 priv->rxdes = NULL; in ftgmac100_free_rings()
915 if (priv->txdes) in ftgmac100_free_rings()
916 dma_free_coherent(priv->dev, MAX_TX_QUEUE_ENTRIES * in ftgmac100_free_rings()
918 priv->txdes, priv->txdes_dma); in ftgmac100_free_rings()
919 priv->txdes = NULL; in ftgmac100_free_rings()
922 if (priv->rx_scratch) in ftgmac100_free_rings()
923 dma_free_coherent(priv->dev, RX_BUF_SIZE, in ftgmac100_free_rings()
924 priv->rx_scratch, priv->rx_scratch_dma); in ftgmac100_free_rings()
930 priv->rx_skbs = kcalloc(MAX_RX_QUEUE_ENTRIES, sizeof(void *), in ftgmac100_alloc_rings()
932 if (!priv->rx_skbs) in ftgmac100_alloc_rings()
933 return -ENOMEM; in ftgmac100_alloc_rings()
934 priv->tx_skbs = kcalloc(MAX_TX_QUEUE_ENTRIES, sizeof(void *), in ftgmac100_alloc_rings()
936 if (!priv->tx_skbs) in ftgmac100_alloc_rings()
937 return -ENOMEM; in ftgmac100_alloc_rings()
940 priv->rxdes = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
942 &priv->rxdes_dma, GFP_KERNEL); in ftgmac100_alloc_rings()
943 if (!priv->rxdes) in ftgmac100_alloc_rings()
944 return -ENOMEM; in ftgmac100_alloc_rings()
945 priv->txdes = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
947 &priv->txdes_dma, GFP_KERNEL); in ftgmac100_alloc_rings()
948 if (!priv->txdes) in ftgmac100_alloc_rings()
949 return -ENOMEM; in ftgmac100_alloc_rings()
952 priv->rx_scratch = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
954 &priv->rx_scratch_dma, in ftgmac100_alloc_rings()
956 if (!priv->rx_scratch) in ftgmac100_alloc_rings()
957 return -ENOMEM; in ftgmac100_alloc_rings()
969 priv->rx_q_entries = priv->new_rx_q_entries; in ftgmac100_init_rings()
970 priv->tx_q_entries = priv->new_tx_q_entries; in ftgmac100_init_rings()
972 if (WARN_ON(priv->rx_q_entries < MIN_RX_QUEUE_ENTRIES)) in ftgmac100_init_rings()
976 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_init_rings()
977 rxdes = &priv->rxdes[i]; in ftgmac100_init_rings()
978 rxdes->rxdes0 = 0; in ftgmac100_init_rings()
979 rxdes->rxdes3 = cpu_to_le32(priv->rx_scratch_dma); in ftgmac100_init_rings()
982 rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask); in ftgmac100_init_rings()
984 if (WARN_ON(priv->tx_q_entries < MIN_RX_QUEUE_ENTRIES)) in ftgmac100_init_rings()
987 /* Initialize TX ring */ in ftgmac100_init_rings()
988 for (i = 0; i < priv->tx_q_entries; i++) { in ftgmac100_init_rings()
989 txdes = &priv->txdes[i]; in ftgmac100_init_rings()
990 txdes->txdes0 = 0; in ftgmac100_init_rings()
992 txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask); in ftgmac100_init_rings()
999 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_alloc_rx_buffers()
1000 struct ftgmac100_rxdes *rxdes = &priv->rxdes[i]; in ftgmac100_alloc_rx_buffers()
1003 return -ENOMEM; in ftgmac100_alloc_rx_buffers()
1010 struct net_device *netdev = bus->priv; in ftgmac100_mdiobus_read()
1015 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1024 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1027 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1032 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA); in ftgmac100_mdiobus_read()
1040 return -EIO; in ftgmac100_mdiobus_read()
1046 struct net_device *netdev = bus->priv; in ftgmac100_mdiobus_write()
1052 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1063 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA); in ftgmac100_mdiobus_write()
1064 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1067 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1076 return -EIO; in ftgmac100_mdiobus_write()
1082 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in ftgmac100_get_drvinfo()
1083 strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info)); in ftgmac100_get_drvinfo()
1095 ering->rx_max_pending = MAX_RX_QUEUE_ENTRIES; in ftgmac100_get_ringparam()
1096 ering->tx_max_pending = MAX_TX_QUEUE_ENTRIES; in ftgmac100_get_ringparam()
1097 ering->rx_pending = priv->rx_q_entries; in ftgmac100_get_ringparam()
1098 ering->tx_pending = priv->tx_q_entries; in ftgmac100_get_ringparam()
1109 if (ering->rx_pending > MAX_RX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1110 ering->tx_pending > MAX_TX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1111 ering->rx_pending < MIN_RX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1112 ering->tx_pending < MIN_TX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1113 !is_power_of_2(ering->rx_pending) || in ftgmac100_set_ringparam()
1114 !is_power_of_2(ering->tx_pending)) in ftgmac100_set_ringparam()
1115 return -EINVAL; in ftgmac100_set_ringparam()
1117 priv->new_rx_q_entries = ering->rx_pending; in ftgmac100_set_ringparam()
1118 priv->new_tx_q_entries = ering->tx_pending; in ftgmac100_set_ringparam()
1120 schedule_work(&priv->reset_task); in ftgmac100_set_ringparam()
1130 pause->autoneg = priv->aneg_pause; in ftgmac100_get_pauseparam()
1131 pause->tx_pause = priv->tx_pause; in ftgmac100_get_pauseparam()
1132 pause->rx_pause = priv->rx_pause; in ftgmac100_get_pauseparam()
1139 struct phy_device *phydev = netdev->phydev; in ftgmac100_set_pauseparam()
1141 priv->aneg_pause = pause->autoneg; in ftgmac100_set_pauseparam()
1142 priv->tx_pause = pause->tx_pause; in ftgmac100_set_pauseparam()
1143 priv->rx_pause = pause->rx_pause; in ftgmac100_set_pauseparam()
1146 phy_set_asym_pause(phydev, pause->rx_pause, pause->tx_pause); in ftgmac100_set_pauseparam()
1149 if (!(phydev && priv->aneg_pause)) in ftgmac100_set_pauseparam()
1175 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_interrupt()
1176 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_interrupt()
1181 netdev->stats.rx_over_errors++; in ftgmac100_interrupt()
1185 netdev->stats.rx_fifo_errors++; in ftgmac100_interrupt()
1187 /* sent packet lost due to excessive TX collision */ in ftgmac100_interrupt()
1189 netdev->stats.tx_fifo_errors++; in ftgmac100_interrupt()
1191 /* AHB error -> Reset the chip */ in ftgmac100_interrupt()
1196 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
1197 schedule_work(&priv->reset_task); in ftgmac100_interrupt()
1201 /* We may need to restart the MAC after such errors, delay in ftgmac100_interrupt()
1204 priv->need_mac_restart = true; in ftgmac100_interrupt()
1211 iowrite32(new_mask, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
1214 napi_schedule_irqoff(&priv->napi); in ftgmac100_interrupt()
1221 struct ftgmac100_rxdes *rxdes = &priv->rxdes[priv->rx_pointer]; in ftgmac100_check_rx()
1224 return !!(rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY)); in ftgmac100_check_rx()
1233 /* Handle TX completions */ in ftgmac100_poll()
1243 /* The interrupt is telling us to kick the MAC back to life in ftgmac100_poll()
1246 if (unlikely(priv->need_mac_restart)) { in ftgmac100_poll()
1248 priv->need_mac_restart = false; in ftgmac100_poll()
1250 /* Re-enable "bad" interrupts */ in ftgmac100_poll()
1252 priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_poll()
1262 /* We are about to re-enable all interrupts. However in ftgmac100_poll()
1263 * the HW has been latching RX/TX packet interrupts while in ftgmac100_poll()
1265 * to re-check if there's something to process in ftgmac100_poll()
1268 priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_poll()
1273 ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_poll()
1275 /* Check RX and TX descriptors for more work to do */ in ftgmac100_poll()
1285 priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_poll()
1295 /* Re-init descriptors (adjust queue sizes) */ in ftgmac100_init_all()
1308 /* Re-enable the device */ in ftgmac100_init_all()
1309 napi_enable(&priv->napi); in ftgmac100_init_all()
1310 netif_start_queue(priv->netdev); in ftgmac100_init_all()
1313 iowrite32(FTGMAC100_INT_ALL, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_init_all()
1320 struct net_device *netdev = priv->netdev; in ftgmac100_reset()
1327 if (netdev->phydev) in ftgmac100_reset()
1328 mutex_lock(&netdev->phydev->lock); in ftgmac100_reset()
1329 if (priv->mii_bus) in ftgmac100_reset()
1330 mutex_lock(&priv->mii_bus->mdio_lock); in ftgmac100_reset()
1339 napi_disable(&priv->napi); in ftgmac100_reset()
1342 /* Stop and reset the MAC */ in ftgmac100_reset()
1350 /* Free all rx and tx buffers */ in ftgmac100_reset()
1358 if (priv->mii_bus) in ftgmac100_reset()
1359 mutex_unlock(&priv->mii_bus->mdio_lock); in ftgmac100_reset()
1360 if (netdev->phydev) in ftgmac100_reset()
1361 mutex_unlock(&netdev->phydev->lock); in ftgmac100_reset()
1376 struct phy_device *phydev = netdev->phydev; in ftgmac100_adjust_link()
1381 if (!phydev->link) in ftgmac100_adjust_link()
1384 new_speed = phydev->speed; in ftgmac100_adjust_link()
1387 if (priv->aneg_pause) { in ftgmac100_adjust_link()
1388 rx_pause = tx_pause = phydev->pause; in ftgmac100_adjust_link()
1389 if (phydev->asym_pause) in ftgmac100_adjust_link()
1392 rx_pause = priv->rx_pause; in ftgmac100_adjust_link()
1393 tx_pause = priv->tx_pause; in ftgmac100_adjust_link()
1397 if (phydev->speed == priv->cur_speed && in ftgmac100_adjust_link()
1398 phydev->duplex == priv->cur_duplex && in ftgmac100_adjust_link()
1399 rx_pause == priv->rx_pause && in ftgmac100_adjust_link()
1400 tx_pause == priv->tx_pause) in ftgmac100_adjust_link()
1406 if (new_speed || priv->cur_speed) in ftgmac100_adjust_link()
1409 priv->cur_speed = new_speed; in ftgmac100_adjust_link()
1410 priv->cur_duplex = phydev->duplex; in ftgmac100_adjust_link()
1411 priv->rx_pause = rx_pause; in ftgmac100_adjust_link()
1412 priv->tx_pause = tx_pause; in ftgmac100_adjust_link()
1419 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_adjust_link()
1424 if (netdev->phydev) in ftgmac100_adjust_link()
1425 mutex_unlock(&netdev->phydev->lock); in ftgmac100_adjust_link()
1429 if (netdev->phydev) in ftgmac100_adjust_link()
1430 mutex_lock(&netdev->phydev->lock); in ftgmac100_adjust_link()
1437 struct platform_device *pdev = to_platform_device(priv->dev); in ftgmac100_mii_probe()
1438 struct device_node *np = pdev->dev.of_node; in ftgmac100_mii_probe()
1458 * those SoC specific bits and assume the device-tree is in ftgmac100_mii_probe()
1462 if (priv->is_aspeed && !(phy_interface_mode_is_rgmii(phy_intf))) { in ftgmac100_mii_probe()
1468 phydev = phy_find_first(priv->mii_bus); in ftgmac100_mii_probe()
1470 netdev_info(netdev, "%s: no PHY found\n", netdev->name); in ftgmac100_mii_probe()
1471 return -ENODEV; in ftgmac100_mii_probe()
1478 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name); in ftgmac100_mii_probe()
1505 /* When using NC-SI we force the speed to 100Mbit/s full duplex, in ftgmac100_open()
1511 if (priv->use_ncsi) { in ftgmac100_open()
1512 priv->cur_duplex = DUPLEX_FULL; in ftgmac100_open()
1513 priv->cur_speed = SPEED_100; in ftgmac100_open()
1515 priv->cur_duplex = 0; in ftgmac100_open()
1516 priv->cur_speed = 0; in ftgmac100_open()
1525 netif_napi_add(netdev, &priv->napi, ftgmac100_poll); in ftgmac100_open()
1528 err = request_irq(netdev->irq, ftgmac100_interrupt, 0, netdev->name, netdev); in ftgmac100_open()
1530 netdev_err(netdev, "failed to request irq %d\n", netdev->irq); in ftgmac100_open()
1541 if (netdev->phydev) { in ftgmac100_open()
1543 phy_start(netdev->phydev); in ftgmac100_open()
1544 } else if (priv->use_ncsi) { in ftgmac100_open()
1545 /* If using NC-SI, set our carrier on and start the stack */ in ftgmac100_open()
1549 err = ncsi_start_dev(priv->ndev); in ftgmac100_open()
1557 napi_disable(&priv->napi); in ftgmac100_open()
1561 free_irq(netdev->irq, netdev); in ftgmac100_open()
1563 netif_napi_del(&priv->napi); in ftgmac100_open()
1565 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_open()
1583 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_stop()
1586 napi_disable(&priv->napi); in ftgmac100_stop()
1587 netif_napi_del(&priv->napi); in ftgmac100_stop()
1588 if (netdev->phydev) in ftgmac100_stop()
1589 phy_stop(netdev->phydev); in ftgmac100_stop()
1590 else if (priv->use_ncsi) in ftgmac100_stop()
1591 ncsi_stop_dev(priv->ndev); in ftgmac100_stop()
1594 free_irq(netdev->irq, netdev); in ftgmac100_stop()
1606 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_tx_timeout()
1609 schedule_work(&priv->reset_task); in ftgmac100_tx_timeout()
1616 netdev_features_t changed = netdev->features ^ features; in ftgmac100_set_features()
1625 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_set_features()
1626 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) in ftgmac100_set_features()
1630 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_set_features()
1642 ftgmac100_interrupt(netdev->irq, netdev); in ftgmac100_poll_controller()
1667 struct platform_device *pdev = to_platform_device(priv->dev); in ftgmac100_setup_mdio()
1668 struct device_node *np = pdev->dev.of_node; in ftgmac100_setup_mdio()
1674 priv->mii_bus = mdiobus_alloc(); in ftgmac100_setup_mdio()
1675 if (!priv->mii_bus) in ftgmac100_setup_mdio()
1676 return -EIO; in ftgmac100_setup_mdio()
1678 if (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_setup_mdio()
1679 of_device_is_compatible(np, "aspeed,ast2500-mac")) { in ftgmac100_setup_mdio()
1685 reg = ioread32(priv->base + FTGMAC100_OFFSET_REVR); in ftgmac100_setup_mdio()
1687 iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR); in ftgmac100_setup_mdio()
1690 priv->mii_bus->name = "ftgmac100_mdio"; in ftgmac100_setup_mdio()
1691 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d", in ftgmac100_setup_mdio()
1692 pdev->name, pdev->id); in ftgmac100_setup_mdio()
1693 priv->mii_bus->parent = priv->dev; in ftgmac100_setup_mdio()
1694 priv->mii_bus->priv = priv->netdev; in ftgmac100_setup_mdio()
1695 priv->mii_bus->read = ftgmac100_mdiobus_read; in ftgmac100_setup_mdio()
1696 priv->mii_bus->write = ftgmac100_mdiobus_write; in ftgmac100_setup_mdio()
1699 priv->mii_bus->irq[i] = PHY_POLL; in ftgmac100_setup_mdio()
1703 err = of_mdiobus_register(priv->mii_bus, mdio_np); in ftgmac100_setup_mdio()
1705 dev_err(priv->dev, "Cannot register MDIO bus!\n"); in ftgmac100_setup_mdio()
1714 mdiobus_free(priv->mii_bus); in ftgmac100_setup_mdio()
1722 if (!netdev->phydev) in ftgmac100_phy_disconnect()
1725 phy_disconnect(netdev->phydev); in ftgmac100_phy_disconnect()
1726 if (of_phy_is_fixed_link(priv->dev->of_node)) in ftgmac100_phy_disconnect()
1727 of_phy_deregister_fixed_link(priv->dev->of_node); in ftgmac100_phy_disconnect()
1734 if (!priv->mii_bus) in ftgmac100_destroy_mdio()
1737 mdiobus_unregister(priv->mii_bus); in ftgmac100_destroy_mdio()
1738 mdiobus_free(priv->mii_bus); in ftgmac100_destroy_mdio()
1743 if (unlikely(nd->state != ncsi_dev_state_functional)) in ftgmac100_ncsi_handler()
1746 netdev_dbg(nd->dev, "NCSI interface %s\n", in ftgmac100_ncsi_handler()
1747 nd->link_up ? "up" : "down"); in ftgmac100_ncsi_handler()
1752 struct clk *clk; in ftgmac100_setup_clk() local
1755 clk = devm_clk_get(priv->dev, NULL /* MACCLK */); in ftgmac100_setup_clk()
1756 if (IS_ERR(clk)) in ftgmac100_setup_clk()
1757 return PTR_ERR(clk); in ftgmac100_setup_clk()
1758 priv->clk = clk; in ftgmac100_setup_clk()
1759 rc = clk_prepare_enable(priv->clk); in ftgmac100_setup_clk()
1767 rc = clk_set_rate(priv->clk, priv->use_ncsi ? FTGMAC_25MHZ : in ftgmac100_setup_clk()
1773 * necessary if it's the AST2400 MAC, or the MAC is configured for in ftgmac100_setup_clk()
1774 * RGMII, or the controller is not an ASPEED-based controller. in ftgmac100_setup_clk()
1776 priv->rclk = devm_clk_get_optional(priv->dev, "RCLK"); in ftgmac100_setup_clk()
1777 rc = clk_prepare_enable(priv->rclk); in ftgmac100_setup_clk()
1782 clk_disable_unprepare(priv->clk); in ftgmac100_setup_clk()
1811 return -ENXIO; in ftgmac100_probe()
1820 err = -ENOMEM; in ftgmac100_probe()
1824 SET_NETDEV_DEV(netdev, &pdev->dev); in ftgmac100_probe()
1826 netdev->ethtool_ops = &ftgmac100_ethtool_ops; in ftgmac100_probe()
1827 netdev->netdev_ops = &ftgmac100_netdev_ops; in ftgmac100_probe()
1828 netdev->watchdog_timeo = 5 * HZ; in ftgmac100_probe()
1834 priv->netdev = netdev; in ftgmac100_probe()
1835 priv->dev = &pdev->dev; in ftgmac100_probe()
1836 INIT_WORK(&priv->reset_task, ftgmac100_reset_task); in ftgmac100_probe()
1839 priv->res = request_mem_region(res->start, resource_size(res), in ftgmac100_probe()
1840 dev_name(&pdev->dev)); in ftgmac100_probe()
1841 if (!priv->res) { in ftgmac100_probe()
1842 dev_err(&pdev->dev, "Could not reserve memory region\n"); in ftgmac100_probe()
1843 err = -ENOMEM; in ftgmac100_probe()
1847 priv->base = ioremap(res->start, resource_size(res)); in ftgmac100_probe()
1848 if (!priv->base) { in ftgmac100_probe()
1849 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n"); in ftgmac100_probe()
1850 err = -EIO; in ftgmac100_probe()
1854 netdev->irq = irq; in ftgmac100_probe()
1857 priv->tx_pause = true; in ftgmac100_probe()
1858 priv->rx_pause = true; in ftgmac100_probe()
1859 priv->aneg_pause = true; in ftgmac100_probe()
1861 /* MAC address from chip or random one */ in ftgmac100_probe()
1866 np = pdev->dev.of_node; in ftgmac100_probe()
1867 if (np && (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_probe()
1868 of_device_is_compatible(np, "aspeed,ast2500-mac") || in ftgmac100_probe()
1869 of_device_is_compatible(np, "aspeed,ast2600-mac"))) { in ftgmac100_probe()
1870 priv->rxdes0_edorr_mask = BIT(30); in ftgmac100_probe()
1871 priv->txdes0_edotr_mask = BIT(30); in ftgmac100_probe()
1872 priv->is_aspeed = true; in ftgmac100_probe()
1874 priv->rxdes0_edorr_mask = BIT(15); in ftgmac100_probe()
1875 priv->txdes0_edotr_mask = BIT(15); in ftgmac100_probe()
1878 if (np && of_get_property(np, "use-ncsi", NULL)) { in ftgmac100_probe()
1880 dev_err(&pdev->dev, "NCSI stack not enabled\n"); in ftgmac100_probe()
1881 err = -EINVAL; in ftgmac100_probe()
1885 dev_info(&pdev->dev, "Using NCSI interface\n"); in ftgmac100_probe()
1886 priv->use_ncsi = true; in ftgmac100_probe()
1887 priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler); in ftgmac100_probe()
1888 if (!priv->ndev) { in ftgmac100_probe()
1889 err = -EINVAL; in ftgmac100_probe()
1897 dev_err(&pdev->dev, "Failed to register fixed PHY\n"); in ftgmac100_probe()
1901 phy = of_phy_get_and_connect(priv->netdev, np, in ftgmac100_probe()
1904 dev_err(&pdev->dev, "Failed to connect to fixed PHY\n"); in ftgmac100_probe()
1906 err = -EINVAL; in ftgmac100_probe()
1912 } else if (np && of_get_property(np, "phy-handle", NULL)) { in ftgmac100_probe()
1919 if (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_probe()
1920 of_device_is_compatible(np, "aspeed,ast2500-mac")) { in ftgmac100_probe()
1926 phy = of_phy_get_and_connect(priv->netdev, np, in ftgmac100_probe()
1929 dev_err(&pdev->dev, "Failed to connect to phy\n"); in ftgmac100_probe()
1930 err = -EINVAL; in ftgmac100_probe()
1943 * MAC with an embedded MDIO controller but have no "mdio" in ftgmac100_probe()
1947 priv->use_ncsi = false; in ftgmac100_probe()
1954 dev_err(priv->dev, "MII probe failed!\n"); in ftgmac100_probe()
1960 if (priv->is_aspeed) { in ftgmac100_probe()
1966 if (of_device_is_compatible(np, "aspeed,ast2600-mac")) in ftgmac100_probe()
1968 priv->base + FTGMAC100_OFFSET_TM); in ftgmac100_probe()
1972 priv->rx_q_entries = priv->new_rx_q_entries = DEF_RX_QUEUE_ENTRIES; in ftgmac100_probe()
1973 priv->tx_q_entries = priv->new_tx_q_entries = DEF_TX_QUEUE_ENTRIES; in ftgmac100_probe()
1976 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_HW_CSUM | in ftgmac100_probe()
1980 if (priv->use_ncsi) in ftgmac100_probe()
1981 netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; in ftgmac100_probe()
1984 if (np && (of_device_is_compatible(np, "aspeed,ast2400-mac"))) in ftgmac100_probe()
1985 netdev->hw_features &= ~NETIF_F_HW_CSUM; in ftgmac100_probe()
1987 /* AST2600 tx checksum with NCSI is broken */ in ftgmac100_probe()
1988 if (priv->use_ncsi && of_device_is_compatible(np, "aspeed,ast2600-mac")) in ftgmac100_probe()
1989 netdev->hw_features &= ~NETIF_F_HW_CSUM; in ftgmac100_probe()
1991 if (np && of_get_property(np, "no-hw-checksum", NULL)) in ftgmac100_probe()
1992 netdev->hw_features &= ~(NETIF_F_HW_CSUM | NETIF_F_RXCSUM); in ftgmac100_probe()
1993 netdev->features |= netdev->hw_features; in ftgmac100_probe()
1998 dev_err(&pdev->dev, "Failed to register netdev\n"); in ftgmac100_probe()
2002 netdev_info(netdev, "irq %d, mapped at %p\n", netdev->irq, priv->base); in ftgmac100_probe()
2007 clk_disable_unprepare(priv->rclk); in ftgmac100_probe()
2008 clk_disable_unprepare(priv->clk); in ftgmac100_probe()
2012 if (priv->ndev) in ftgmac100_probe()
2013 ncsi_unregister_dev(priv->ndev); in ftgmac100_probe()
2016 iounmap(priv->base); in ftgmac100_probe()
2018 release_resource(priv->res); in ftgmac100_probe()
2033 if (priv->ndev) in ftgmac100_remove()
2034 ncsi_unregister_dev(priv->ndev); in ftgmac100_remove()
2037 clk_disable_unprepare(priv->rclk); in ftgmac100_remove()
2038 clk_disable_unprepare(priv->clk); in ftgmac100_remove()
2040 /* There's a small chance the reset task will have been re-queued, in ftgmac100_remove()
2043 cancel_work_sync(&priv->reset_task); in ftgmac100_remove()
2048 iounmap(priv->base); in ftgmac100_remove()
2049 release_resource(priv->res); in ftgmac100_remove()
2051 netif_napi_del(&priv->napi); in ftgmac100_remove()
2072 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");