Lines Matching refs:db
354 struct dmfe_board_info *db; /* board information structure */ in dmfe_init_one() local
378 dev = alloc_etherdev(sizeof(*db)); in dmfe_init_one()
422 db = netdev_priv(dev); in dmfe_init_one()
425 db->desc_pool_ptr = dma_alloc_coherent(&pdev->dev, in dmfe_init_one()
427 &db->desc_pool_dma_ptr, GFP_KERNEL); in dmfe_init_one()
428 if (!db->desc_pool_ptr) { in dmfe_init_one()
433 db->buf_pool_ptr = dma_alloc_coherent(&pdev->dev, in dmfe_init_one()
435 &db->buf_pool_dma_ptr, GFP_KERNEL); in dmfe_init_one()
436 if (!db->buf_pool_ptr) { in dmfe_init_one()
441 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in dmfe_init_one()
442 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in dmfe_init_one()
443 db->buf_pool_start = db->buf_pool_ptr; in dmfe_init_one()
444 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in dmfe_init_one()
446 db->chip_id = ent->driver_data; in dmfe_init_one()
448 db->ioaddr = pci_iomap(pdev, 0, 0); in dmfe_init_one()
449 if (!db->ioaddr) { in dmfe_init_one()
454 db->chip_revision = pdev->revision; in dmfe_init_one()
455 db->wol_mode = 0; in dmfe_init_one()
457 db->pdev = pdev; in dmfe_init_one()
463 spin_lock_init(&db->lock); in dmfe_init_one()
467 if ( (pci_pmr == 0x10000) && (db->chip_revision == 0x31) ) in dmfe_init_one()
468 db->chip_type = 1; /* DM9102A E3 */ in dmfe_init_one()
470 db->chip_type = 0; in dmfe_init_one()
474 ((__le16 *) db->srom)[i] = in dmfe_init_one()
475 cpu_to_le16(read_srom_word(db->ioaddr, i)); in dmfe_init_one()
479 eth_hw_addr_set(dev, &db->srom[20]); in dmfe_init_one()
494 pci_iounmap(pdev, db->ioaddr); in dmfe_init_one()
497 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_init_one()
501 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_init_one()
516 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_remove_one() local
523 pci_iounmap(db->pdev, db->ioaddr); in dmfe_remove_one()
524 dma_free_coherent(&db->pdev->dev, in dmfe_remove_one()
526 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_remove_one()
527 dma_free_coherent(&db->pdev->dev, in dmfe_remove_one()
529 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_remove_one()
545 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_open() local
546 const int irq = db->pdev->irq; in dmfe_open()
556 db->cr6_data = CR6_DEFAULT | dmfe_cr6_user_set; in dmfe_open()
557 db->tx_packet_cnt = 0; in dmfe_open()
558 db->tx_queue_cnt = 0; in dmfe_open()
559 db->rx_avail_cnt = 0; in dmfe_open()
560 db->wait_reset = 0; in dmfe_open()
562 db->first_in_callback = 0; in dmfe_open()
563 db->NIC_capability = 0xf; /* All capability*/ in dmfe_open()
564 db->PHY_reg4 = 0x1e0; in dmfe_open()
567 if ( !chkmode || (db->chip_id == PCI_DM9132_ID) || in dmfe_open()
568 (db->chip_revision >= 0x30) ) { in dmfe_open()
569 db->cr6_data |= DMFE_TXTH_256; in dmfe_open()
570 db->cr0_data = CR0_DEFAULT; in dmfe_open()
571 db->dm910x_chk_mode=4; /* Enter the normal mode */ in dmfe_open()
573 db->cr6_data |= CR6_SFT; /* Store & Forward mode */ in dmfe_open()
574 db->cr0_data = 0; in dmfe_open()
575 db->dm910x_chk_mode = 1; /* Enter the check mode */ in dmfe_open()
585 timer_setup(&db->timer, dmfe_timer, 0); in dmfe_open()
586 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_open()
587 add_timer(&db->timer); in dmfe_open()
602 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_init_dm910x() local
603 void __iomem *ioaddr = db->ioaddr; in dmfe_init_dm910x()
610 dw32(DCR0, db->cr0_data); in dmfe_init_dm910x()
614 db->phy_addr = 1; in dmfe_init_dm910x()
617 dmfe_parse_srom(db); in dmfe_init_dm910x()
618 db->media_mode = dmfe_media_mode; in dmfe_init_dm910x()
622 if (db->chip_id == PCI_DM9009_ID) { in dmfe_init_dm910x()
629 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */ in dmfe_init_dm910x()
630 dmfe_set_phyxcer(db); in dmfe_init_dm910x()
633 if ( !(db->media_mode & DMFE_AUTO) ) in dmfe_init_dm910x()
634 db->op_mode = db->media_mode; /* Force Mode */ in dmfe_init_dm910x()
640 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
643 if (db->chip_id == PCI_DM9132_ID) in dmfe_init_dm910x()
649 db->cr7_data = CR7_DEFAULT; in dmfe_init_dm910x()
650 dw32(DCR7, db->cr7_data); in dmfe_init_dm910x()
653 dw32(DCR15, db->cr15_data); in dmfe_init_dm910x()
656 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000; in dmfe_init_dm910x()
657 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
669 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_start_xmit() local
670 void __iomem *ioaddr = db->ioaddr; in dmfe_start_xmit()
686 spin_lock_irqsave(&db->lock, flags); in dmfe_start_xmit()
689 if (db->tx_queue_cnt >= TX_FREE_DESC_CNT) { in dmfe_start_xmit()
690 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
691 pr_err("No Tx resource %ld\n", db->tx_queue_cnt); in dmfe_start_xmit()
699 txptr = db->tx_insert_ptr; in dmfe_start_xmit()
704 db->tx_insert_ptr = txptr->next_tx_desc; in dmfe_start_xmit()
707 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) { in dmfe_start_xmit()
709 db->tx_packet_cnt++; /* Ready to send */ in dmfe_start_xmit()
713 db->tx_queue_cnt++; /* queue TX packet */ in dmfe_start_xmit()
718 if ( db->tx_queue_cnt < TX_FREE_DESC_CNT ) in dmfe_start_xmit()
722 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
723 dw32(DCR7, db->cr7_data); in dmfe_start_xmit()
739 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_stop() local
740 void __iomem *ioaddr = db->ioaddr; in dmfe_stop()
748 del_timer_sync(&db->timer); in dmfe_stop()
753 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in dmfe_stop()
756 free_irq(db->pdev->irq, dev); in dmfe_stop()
759 dmfe_free_rxbuffer(db); in dmfe_stop()
764 db->tx_fifo_underrun, db->tx_excessive_collision, in dmfe_stop()
765 db->tx_late_collision, db->tx_no_carrier, db->tx_loss_carrier, in dmfe_stop()
766 db->tx_jabber_timeout, db->reset_count, db->reset_cr8, in dmfe_stop()
767 db->reset_fatal, db->reset_TXtimeout); in dmfe_stop()
782 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_interrupt() local
783 void __iomem *ioaddr = db->ioaddr; in dmfe_interrupt()
788 spin_lock_irqsave(&db->lock, flags); in dmfe_interrupt()
791 db->cr5_data = dr32(DCR5); in dmfe_interrupt()
792 dw32(DCR5, db->cr5_data); in dmfe_interrupt()
793 if ( !(db->cr5_data & 0xc1) ) { in dmfe_interrupt()
794 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
802 if (db->cr5_data & 0x2000) { in dmfe_interrupt()
804 DMFE_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in dmfe_interrupt()
805 db->reset_fatal++; in dmfe_interrupt()
806 db->wait_reset = 1; /* Need to RESET */ in dmfe_interrupt()
807 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
812 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in dmfe_interrupt()
813 dmfe_rx_packet(dev, db); in dmfe_interrupt()
816 if (db->rx_avail_cnt<RX_DESC_CNT) in dmfe_interrupt()
820 if ( db->cr5_data & 0x01) in dmfe_interrupt()
821 dmfe_free_tx_pkt(dev, db); in dmfe_interrupt()
824 if (db->dm910x_chk_mode & 0x2) { in dmfe_interrupt()
825 db->dm910x_chk_mode = 0x4; in dmfe_interrupt()
826 db->cr6_data |= 0x100; in dmfe_interrupt()
827 update_cr6(db->cr6_data, ioaddr); in dmfe_interrupt()
831 dw32(DCR7, db->cr7_data); in dmfe_interrupt()
833 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
847 struct dmfe_board_info *db = netdev_priv(dev); in poll_dmfe() local
848 const int irq = db->pdev->irq; in poll_dmfe()
862 static void dmfe_free_tx_pkt(struct net_device *dev, struct dmfe_board_info *db) in dmfe_free_tx_pkt() argument
865 void __iomem *ioaddr = db->ioaddr; in dmfe_free_tx_pkt()
868 txptr = db->tx_remove_ptr; in dmfe_free_tx_pkt()
869 while(db->tx_packet_cnt) { in dmfe_free_tx_pkt()
875 db->tx_packet_cnt--; in dmfe_free_tx_pkt()
886 db->tx_fifo_underrun++; in dmfe_free_tx_pkt()
887 if ( !(db->cr6_data & CR6_SFT) ) { in dmfe_free_tx_pkt()
888 db->cr6_data = db->cr6_data | CR6_SFT; in dmfe_free_tx_pkt()
889 update_cr6(db->cr6_data, ioaddr); in dmfe_free_tx_pkt()
893 db->tx_excessive_collision++; in dmfe_free_tx_pkt()
895 db->tx_late_collision++; in dmfe_free_tx_pkt()
897 db->tx_no_carrier++; in dmfe_free_tx_pkt()
899 db->tx_loss_carrier++; in dmfe_free_tx_pkt()
901 db->tx_jabber_timeout++; in dmfe_free_tx_pkt()
909 db->tx_remove_ptr = txptr; in dmfe_free_tx_pkt()
912 if ( (db->tx_packet_cnt < TX_MAX_SEND_CNT) && db->tx_queue_cnt ) { in dmfe_free_tx_pkt()
914 db->tx_packet_cnt++; /* Ready to send */ in dmfe_free_tx_pkt()
915 db->tx_queue_cnt--; in dmfe_free_tx_pkt()
921 if ( db->tx_queue_cnt < TX_WAKE_DESC_CNT ) in dmfe_free_tx_pkt()
944 static void dmfe_rx_packet(struct net_device *dev, struct dmfe_board_info *db) in dmfe_rx_packet() argument
951 rxptr = db->rx_ready_ptr; in dmfe_rx_packet()
953 while(db->rx_avail_cnt) { in dmfe_rx_packet()
958 db->rx_avail_cnt--; in dmfe_rx_packet()
959 db->interval_rx_cnt++; in dmfe_rx_packet()
961 dma_unmap_single(&db->pdev->dev, le32_to_cpu(rxptr->rdes2), in dmfe_rx_packet()
968 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
986 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in dmfe_rx_packet()
990 if ( (db->dm910x_chk_mode & 1) && in dmfe_rx_packet()
994 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
995 db->dm910x_chk_mode = 3; in dmfe_rx_packet()
1009 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1021 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1028 db->rx_ready_ptr = rxptr; in dmfe_rx_packet()
1037 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_set_filter_mode() local
1042 spin_lock_irqsave(&db->lock, flags); in dmfe_set_filter_mode()
1046 db->cr6_data |= CR6_PM | CR6_PBF; in dmfe_set_filter_mode()
1047 update_cr6(db->cr6_data, db->ioaddr); in dmfe_set_filter_mode()
1048 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1054 db->cr6_data &= ~(CR6_PM | CR6_PBF); in dmfe_set_filter_mode()
1055 db->cr6_data |= CR6_PAM; in dmfe_set_filter_mode()
1056 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1061 if (db->chip_id == PCI_DM9132_ID) in dmfe_set_filter_mode()
1065 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1084 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_set_wol() local
1090 db->wol_mode = wolinfo->wolopts; in dmfe_ethtool_set_wol()
1097 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_get_wol() local
1100 wolinfo->wolopts = db->wol_mode; in dmfe_ethtool_get_wol()
1118 struct dmfe_board_info *db = from_timer(db, t, timer); in dmfe_timer() local
1119 struct net_device *dev = pci_get_drvdata(db->pdev); in dmfe_timer()
1120 void __iomem *ioaddr = db->ioaddr; in dmfe_timer()
1128 spin_lock_irqsave(&db->lock, flags); in dmfe_timer()
1131 if (db->first_in_callback == 0) { in dmfe_timer()
1132 db->first_in_callback = 1; in dmfe_timer()
1133 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) { in dmfe_timer()
1134 db->cr6_data &= ~0x40000; in dmfe_timer()
1135 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1136 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x1000, db->chip_id); in dmfe_timer()
1137 db->cr6_data |= 0x40000; in dmfe_timer()
1138 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1139 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_timer()
1140 add_timer(&db->timer); in dmfe_timer()
1141 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1148 if ( (db->dm910x_chk_mode & 0x1) && in dmfe_timer()
1150 db->dm910x_chk_mode = 0x4; in dmfe_timer()
1154 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in dmfe_timer()
1155 db->reset_cr8++; in dmfe_timer()
1156 db->wait_reset = 1; in dmfe_timer()
1158 db->interval_rx_cnt = 0; in dmfe_timer()
1161 if ( db->tx_packet_cnt && in dmfe_timer()
1167 db->reset_TXtimeout++; in dmfe_timer()
1168 db->wait_reset = 1; in dmfe_timer()
1173 if (db->wait_reset) { in dmfe_timer()
1174 DMFE_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in dmfe_timer()
1175 db->reset_count++; in dmfe_timer()
1177 db->first_in_callback = 0; in dmfe_timer()
1178 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1179 add_timer(&db->timer); in dmfe_timer()
1180 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1185 if (db->chip_id == PCI_DM9132_ID) in dmfe_timer()
1190 if ( ((db->chip_id == PCI_DM9102_ID) && in dmfe_timer()
1191 (db->chip_revision == 0x30)) || in dmfe_timer()
1192 ((db->chip_id == PCI_DM9132_ID) && in dmfe_timer()
1193 (db->chip_revision == 0x10)) ) { in dmfe_timer()
1212 dmfe_phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_timer()
1213 link_ok_phy = (dmfe_phy_read (db->ioaddr, in dmfe_timer()
1214 db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0; in dmfe_timer()
1228 if ( !(db->media_mode & 0x38) ) in dmfe_timer()
1229 dmfe_phy_write(db->ioaddr, db->phy_addr, in dmfe_timer()
1230 0, 0x1000, db->chip_id); in dmfe_timer()
1233 if (db->media_mode & DMFE_AUTO) { in dmfe_timer()
1235 db->cr6_data|=0x00040000; /* bit18=1, MII */ in dmfe_timer()
1236 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in dmfe_timer()
1237 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1244 if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) { in dmfe_timer()
1246 SHOW_MEDIA_TYPE(db->op_mode); in dmfe_timer()
1249 dmfe_process_mode(db); in dmfe_timer()
1253 if (db->HPNA_command & 0xf00) { in dmfe_timer()
1254 db->HPNA_timer--; in dmfe_timer()
1255 if (!db->HPNA_timer) in dmfe_timer()
1256 dmfe_HPNA_remote_cmd_chk(db); in dmfe_timer()
1260 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1261 add_timer(&db->timer); in dmfe_timer()
1262 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1276 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_dynamic_reset() local
1277 void __iomem *ioaddr = db->ioaddr; in dmfe_dynamic_reset()
1282 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in dmfe_dynamic_reset()
1283 update_cr6(db->cr6_data, ioaddr); in dmfe_dynamic_reset()
1291 dmfe_free_rxbuffer(db); in dmfe_dynamic_reset()
1294 db->tx_packet_cnt = 0; in dmfe_dynamic_reset()
1295 db->tx_queue_cnt = 0; in dmfe_dynamic_reset()
1296 db->rx_avail_cnt = 0; in dmfe_dynamic_reset()
1298 db->wait_reset = 0; in dmfe_dynamic_reset()
1312 static void dmfe_free_rxbuffer(struct dmfe_board_info * db) in dmfe_free_rxbuffer() argument
1317 while (db->rx_avail_cnt) { in dmfe_free_rxbuffer()
1318 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in dmfe_free_rxbuffer()
1319 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in dmfe_free_rxbuffer()
1320 db->rx_avail_cnt--; in dmfe_free_rxbuffer()
1329 static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb) in dmfe_reuse_skb() argument
1331 struct rx_desc *rxptr = db->rx_insert_ptr; in dmfe_reuse_skb()
1335 rxptr->rdes2 = cpu_to_le32(dma_map_single(&db->pdev->dev, skb->data, in dmfe_reuse_skb()
1339 db->rx_avail_cnt++; in dmfe_reuse_skb()
1340 db->rx_insert_ptr = rxptr->next_rx_desc; in dmfe_reuse_skb()
1342 DMFE_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in dmfe_reuse_skb()
1353 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_descriptor_init() local
1354 void __iomem *ioaddr = db->ioaddr; in dmfe_descriptor_init()
1365 db->tx_insert_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1366 db->tx_remove_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1367 dw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in dmfe_descriptor_init()
1370 db->first_rx_desc = (void *)db->first_tx_desc + in dmfe_descriptor_init()
1373 db->first_rx_desc_dma = db->first_tx_desc_dma + in dmfe_descriptor_init()
1375 db->rx_insert_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1376 db->rx_ready_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1377 dw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in dmfe_descriptor_init()
1380 tmp_buf = db->buf_pool_start; in dmfe_descriptor_init()
1381 tmp_buf_dma = db->buf_pool_dma_start; in dmfe_descriptor_init()
1382 tmp_tx_dma = db->first_tx_desc_dma; in dmfe_descriptor_init()
1383 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in dmfe_descriptor_init()
1394 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in dmfe_descriptor_init()
1395 tmp_tx->next_tx_desc = db->first_tx_desc; in dmfe_descriptor_init()
1398 tmp_rx_dma=db->first_rx_desc_dma; in dmfe_descriptor_init()
1399 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in dmfe_descriptor_init()
1406 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in dmfe_descriptor_init()
1407 tmp_rx->next_rx_desc = db->first_rx_desc; in dmfe_descriptor_init()
1439 struct dmfe_board_info *db = netdev_priv(dev); in dm9132_id_table() local
1440 void __iomem *ioaddr = db->ioaddr + 0xc0; in dm9132_id_table()
1476 struct dmfe_board_info *db = netdev_priv(dev); in send_filter_frame() local
1485 txptr = db->tx_insert_ptr; in send_filter_frame()
1514 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1518 if (!db->tx_packet_cnt) { in send_filter_frame()
1519 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1522 db->tx_packet_cnt++; in send_filter_frame()
1524 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1526 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1529 db->tx_queue_cnt++; /* Put in TX queue */ in send_filter_frame()
1540 struct dmfe_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1544 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1546 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1550 rxptr->rdes2 = cpu_to_le32(dma_map_single(&db->pdev->dev, skb->data, in allocate_rx_buffer()
1555 db->rx_avail_cnt++; in allocate_rx_buffer()
1558 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1622 static u8 dmfe_sense_speed(struct dmfe_board_info *db) in dmfe_sense_speed() argument
1624 void __iomem *ioaddr = db->ioaddr; in dmfe_sense_speed()
1629 update_cr6(db->cr6_data & ~0x40000, ioaddr); in dmfe_sense_speed()
1631 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1632 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1635 if (db->chip_id == PCI_DM9132_ID) /* DM9132 */ in dmfe_sense_speed()
1636 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1637 db->phy_addr, 7, db->chip_id) & 0xf000; in dmfe_sense_speed()
1639 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1640 db->phy_addr, 17, db->chip_id) & 0xf000; in dmfe_sense_speed()
1642 case 0x1000: db->op_mode = DMFE_10MHF; break; in dmfe_sense_speed()
1643 case 0x2000: db->op_mode = DMFE_10MFD; break; in dmfe_sense_speed()
1644 case 0x4000: db->op_mode = DMFE_100MHF; break; in dmfe_sense_speed()
1645 case 0x8000: db->op_mode = DMFE_100MFD; break; in dmfe_sense_speed()
1646 default: db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1651 db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1666 static void dmfe_set_phyxcer(struct dmfe_board_info *db) in dmfe_set_phyxcer() argument
1668 void __iomem *ioaddr = db->ioaddr; in dmfe_set_phyxcer()
1672 db->cr6_data &= ~0x40000; in dmfe_set_phyxcer()
1673 update_cr6(db->cr6_data, ioaddr); in dmfe_set_phyxcer()
1676 if (db->chip_id == PCI_DM9009_ID) { in dmfe_set_phyxcer()
1677 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1678 db->phy_addr, 18, db->chip_id) & ~0x1000; in dmfe_set_phyxcer()
1680 dmfe_phy_write(db->ioaddr, in dmfe_set_phyxcer()
1681 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1685 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1687 if (db->media_mode & DMFE_AUTO) { in dmfe_set_phyxcer()
1689 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1692 switch(db->media_mode) { in dmfe_set_phyxcer()
1698 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
1703 phy_reg|=db->PHY_reg4; in dmfe_set_phyxcer()
1704 db->media_mode|=DMFE_AUTO; in dmfe_set_phyxcer()
1706 dmfe_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1709 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_set_phyxcer()
1710 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1800, db->chip_id); in dmfe_set_phyxcer()
1711 if ( !db->chip_type ) in dmfe_set_phyxcer()
1712 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in dmfe_set_phyxcer()
1723 static void dmfe_process_mode(struct dmfe_board_info *db) in dmfe_process_mode() argument
1728 if (db->op_mode & 0x4) in dmfe_process_mode()
1729 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in dmfe_process_mode()
1731 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in dmfe_process_mode()
1734 if (db->op_mode & 0x10) /* 1M HomePNA */ in dmfe_process_mode()
1735 db->cr6_data |= 0x40000;/* External MII select */ in dmfe_process_mode()
1737 db->cr6_data &= ~0x40000;/* Internal 10/100 transciver */ in dmfe_process_mode()
1739 update_cr6(db->cr6_data, db->ioaddr); in dmfe_process_mode()
1742 if ( !(db->media_mode & 0x18)) { in dmfe_process_mode()
1744 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 6, db->chip_id); in dmfe_process_mode()
1748 switch(db->op_mode) { in dmfe_process_mode()
1754 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1755 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1756 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_process_mode()
1758 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1759 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1901 static void dmfe_parse_srom(struct dmfe_board_info * db) in dmfe_parse_srom() argument
1903 char * srom = db->srom; in dmfe_parse_srom()
1909 db->cr15_data = CR15_DEFAULT; in dmfe_parse_srom()
1915 db->NIC_capability = le16_to_cpup((__le16 *) (srom + 34)); in dmfe_parse_srom()
1916 db->PHY_reg4 = 0; in dmfe_parse_srom()
1918 switch( db->NIC_capability & tmp_reg ) { in dmfe_parse_srom()
1919 case 0x1: db->PHY_reg4 |= 0x0020; break; in dmfe_parse_srom()
1920 case 0x2: db->PHY_reg4 |= 0x0040; break; in dmfe_parse_srom()
1921 case 0x4: db->PHY_reg4 |= 0x0080; break; in dmfe_parse_srom()
1922 case 0x8: db->PHY_reg4 |= 0x0100; break; in dmfe_parse_srom()
1940 db->cr15_data |= 0x40; in dmfe_parse_srom()
1944 db->cr15_data |= 0x400; in dmfe_parse_srom()
1948 db->cr15_data |= 0x9800; in dmfe_parse_srom()
1952 db->HPNA_command = 1; in dmfe_parse_srom()
1956 db->HPNA_command |= 0x8000; in dmfe_parse_srom()
1961 case 0: db->HPNA_command |= 0x0904; break; in dmfe_parse_srom()
1962 case 1: db->HPNA_command |= 0x0a00; break; in dmfe_parse_srom()
1963 case 2: db->HPNA_command |= 0x0506; break; in dmfe_parse_srom()
1964 case 3: db->HPNA_command |= 0x0602; break; in dmfe_parse_srom()
1968 case 0: db->HPNA_command |= 0x0004; break; in dmfe_parse_srom()
1969 case 1: db->HPNA_command |= 0x0000; break; in dmfe_parse_srom()
1970 case 2: db->HPNA_command |= 0x0006; break; in dmfe_parse_srom()
1971 case 3: db->HPNA_command |= 0x0002; break; in dmfe_parse_srom()
1975 db->HPNA_present = 0; in dmfe_parse_srom()
1976 update_cr6(db->cr6_data | 0x40000, db->ioaddr); in dmfe_parse_srom()
1977 tmp_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id); in dmfe_parse_srom()
1980 db->HPNA_timer = 8; in dmfe_parse_srom()
1981 if ( dmfe_phy_read(db->ioaddr, db->phy_addr, 31, db->chip_id) == 0x4404) { in dmfe_parse_srom()
1983 db->HPNA_present = 1; in dmfe_parse_srom()
1984 dmfe_program_DM9801(db, tmp_reg); in dmfe_parse_srom()
1987 db->HPNA_present = 2; in dmfe_parse_srom()
1988 dmfe_program_DM9802(db); in dmfe_parse_srom()
1999 static void dmfe_program_DM9801(struct dmfe_board_info * db, int HPNA_rev) in dmfe_program_DM9801() argument
2006 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2007 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 24, db->chip_id); in dmfe_program_DM9801()
2009 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2012 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2014 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2020 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2021 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2023 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2027 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9801()
2028 dmfe_phy_write(db->ioaddr, db->phy_addr, 17, reg17, db->chip_id); in dmfe_program_DM9801()
2029 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, reg25, db->chip_id); in dmfe_program_DM9801()
2037 static void dmfe_program_DM9802(struct dmfe_board_info * db) in dmfe_program_DM9802() argument
2042 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9802()
2043 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9802()
2045 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, phy_reg, db->chip_id); in dmfe_program_DM9802()
2054 static void dmfe_HPNA_remote_cmd_chk(struct dmfe_board_info * db) in dmfe_HPNA_remote_cmd_chk() argument
2059 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id) & 0x60; in dmfe_HPNA_remote_cmd_chk()
2068 if ( phy_reg != (db->HPNA_command & 0x0f00) ) { in dmfe_HPNA_remote_cmd_chk()
2069 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, in dmfe_HPNA_remote_cmd_chk()
2070 db->chip_id); in dmfe_HPNA_remote_cmd_chk()
2071 db->HPNA_timer=8; in dmfe_HPNA_remote_cmd_chk()
2073 db->HPNA_timer=600; /* Match, every 10 minutes, check */ in dmfe_HPNA_remote_cmd_chk()
2090 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_suspend() local
2091 void __iomem *ioaddr = db->ioaddr; in dmfe_suspend()
2097 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); in dmfe_suspend()
2098 update_cr6(db->cr6_data, ioaddr); in dmfe_suspend()
2105 dmfe_free_rxbuffer(db); in dmfe_suspend()