23 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val)  in mv88e6xxx_g1_write()  function
91 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6250_g1_eeprom_reload()
177 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_01, reg);  in mv88e6xxx_g1_set_switch_mac()
182 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_23, reg);  in mv88e6xxx_g1_set_switch_mac()
187 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_45, reg);  in mv88e6xxx_g1_set_switch_mac()
211 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_reset()
234 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6250_g1_reset()
263 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_ppu_enable()
281 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_ppu_disable()
304 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);  in mv88e6185_g1_set_max_frame_size()
322 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_0, 0x0000);  in mv88e6085_g1_ip_pri_map()
326 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_1, 0x0000);  in mv88e6085_g1_ip_pri_map()
330 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_2, 0x5555);  in mv88e6085_g1_ip_pri_map()
334 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_3, 0x5555);  in mv88e6085_g1_ip_pri_map()
338 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_4, 0xaaaa);  in mv88e6085_g1_ip_pri_map()
342 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_5, 0xaaaa);  in mv88e6085_g1_ip_pri_map()
346 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_6, 0xffff);  in mv88e6085_g1_ip_pri_map()
350 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_7, 0xffff);  in mv88e6085_g1_ip_pri_map()
362 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41);  in mv88e6085_g1_ieee_pri_map()
368 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa50);  in mv88e6250_g1_ieee_pri_map()
400 	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);  in mv88e6095_g1_set_egress_port()
419 	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);  in mv88e6095_g1_set_cpu_port()
429 	return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);  in mv88e6390_g1_monitor_write()
523 	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL2, reg);  in mv88e6xxx_g1_ctl2_mask()
585 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP, val);  in mv88e6095_g1_stats_set_histogram()
595 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,  in mv88e6xxx_g1_stats_snapshot()
620 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,  in mv88e6390_g1_stats_snapshot()
638 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,  in mv88e6xxx_g1_stats_read()
674 	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP, val);  in mv88e6xxx_g1_stats_clear()