510 		emc_writel(emc, emc_cfg, EMC_CFG);  in tegra210_emc_r21021_periodic_compensation()
528 		emc_writel(emc, value, EMC_CFG_UPDATE);  in tegra210_emc_r21021_periodic_compensation()
561 				emc_writel(emc, value, list[i]);  in tegra210_emc_r21021_periodic_compensation()
565 		emc_writel(emc, emc_cfg_o, EMC_CFG);  in tegra210_emc_r21021_periodic_compensation()
573 		emc_writel(emc, emc_cfg_update, EMC_CFG_UPDATE);  in tegra210_emc_r21021_periodic_compensation()
698 	emc_writel(emc, value, EMC_CFG_DIG_DLL);  in tegra210_emc_r21021_set_clock()
714 	emc_writel(emc, emc_auto_cal_config, EMC_AUTO_CAL_CONFIG);  in tegra210_emc_r21021_set_clock()
720 	emc_writel(emc, emc_cfg, EMC_CFG);  in tegra210_emc_r21021_set_clock()
721 	emc_writel(emc, emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL);  in tegra210_emc_r21021_set_clock()
750 	emc_writel(emc, EMC_INTSTATUS_CLKCHANGE_COMPLETE, EMC_INTSTATUS);  in tegra210_emc_r21021_set_clock()
752 	emc_writel(emc, emc_cfg, EMC_CFG);  in tegra210_emc_r21021_set_clock()
753 	emc_writel(emc, emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL);  in tegra210_emc_r21021_set_clock()
754 	emc_writel(emc, emc_cfg_pipe_clk | EMC_CFG_PIPE_CLK_CLK_ALWAYS_ON,  in tegra210_emc_r21021_set_clock()
756 	emc_writel(emc, next->emc_fdpd_ctrl_cmd_no_ramp &  in tegra210_emc_r21021_set_clock()
778 			emc_writel(emc, last->burst_regs  in tegra210_emc_r21021_set_clock()
784 			emc_writel(emc, last->burst_regs  in tegra210_emc_r21021_set_clock()
813 		emc_writel(emc, value, EMC_PMACRO_DATA_PAD_TX_CTRL);  in tegra210_emc_r21021_set_clock()
844 	emc_writel(emc, next->emc_auto_cal_config2, EMC_AUTO_CAL_CONFIG2);  in tegra210_emc_r21021_set_clock()
845 	emc_writel(emc, next->emc_auto_cal_config3, EMC_AUTO_CAL_CONFIG3);  in tegra210_emc_r21021_set_clock()
846 	emc_writel(emc, next->emc_auto_cal_config4, EMC_AUTO_CAL_CONFIG4);  in tegra210_emc_r21021_set_clock()
847 	emc_writel(emc, next->emc_auto_cal_config5, EMC_AUTO_CAL_CONFIG5);  in tegra210_emc_r21021_set_clock()
848 	emc_writel(emc, next->emc_auto_cal_config6, EMC_AUTO_CAL_CONFIG6);  in tegra210_emc_r21021_set_clock()
849 	emc_writel(emc, next->emc_auto_cal_config7, EMC_AUTO_CAL_CONFIG7);  in tegra210_emc_r21021_set_clock()
850 	emc_writel(emc, next->emc_auto_cal_config8, EMC_AUTO_CAL_CONFIG8);  in tegra210_emc_r21021_set_clock()
855 	emc_writel(emc, emc_auto_cal_config, EMC_AUTO_CAL_CONFIG);  in tegra210_emc_r21021_set_clock()
866 		emc_writel(emc, next->emc_cfg_2, EMC_CFG_2);  in tegra210_emc_r21021_set_clock()
972 				emc_writel(emc, RP_war, EMC_RP);  in tegra210_emc_r21021_set_clock()
973 				emc_writel(emc, R2P_war, EMC_R2P);  in tegra210_emc_r21021_set_clock()
974 				emc_writel(emc, W2P_war, EMC_W2P);  in tegra210_emc_r21021_set_clock()
975 				emc_writel(emc, TRPab_war, EMC_TRPAB);  in tegra210_emc_r21021_set_clock()
993 		emc_writel(emc, mr13_flip_fspwr, EMC_MRW3);  in tegra210_emc_r21021_set_clock()
994 		emc_writel(emc, next->emc_mrw, EMC_MRW);  in tegra210_emc_r21021_set_clock()
995 		emc_writel(emc, next->emc_mrw2, EMC_MRW2);  in tegra210_emc_r21021_set_clock()
1069 		emc_writel(emc, value, offset);  in tegra210_emc_r21021_set_clock()
1078 		emc_writel(emc, value, EMC_MRW);  in tegra210_emc_r21021_set_clock()
1159 			emc_writel(emc, value, offsets[i]);  in tegra210_emc_r21021_set_clock()
1163 			emc_writel(emc, next->trim_regs[i], offsets[i]);  in tegra210_emc_r21021_set_clock()
1245 		emc_writel(emc, 0, EMC_ZCAL_INTERVAL);  in tegra210_emc_r21021_set_clock()
1246 		emc_writel(emc, value, EMC_ZCAL_WAIT_CNT);  in tegra210_emc_r21021_set_clock()
1251 		emc_writel(emc, value, EMC_DBG);  in tegra210_emc_r21021_set_clock()
1252 		emc_writel(emc, 0, EMC_ZCAL_INTERVAL);  in tegra210_emc_r21021_set_clock()
1253 		emc_writel(emc, emc_dbg, EMC_DBG);  in tegra210_emc_r21021_set_clock()
1626 			emc_writel(emc,  in tegra210_emc_r21021_set_clock()
1631 			emc_writel(emc,  in tegra210_emc_r21021_set_clock()
1649 	emc_writel(emc, value, EMC_CFG_DIG_DLL);  in tegra210_emc_r21021_set_clock()
1680 		emc_writel(emc, next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX],  in tegra210_emc_r21021_set_clock()
1682 		emc_writel(emc, next->burst_regs[EMC_ZCAL_INTERVAL_INDEX],  in tegra210_emc_r21021_set_clock()
1693 			emc_writel(emc, next->burst_regs[EMC_MRS_WAIT_CNT_INDEX],  in tegra210_emc_r21021_set_clock()
1696 			emc_writel(emc, next->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX],  in tegra210_emc_r21021_set_clock()
1708 	emc_writel(emc, next->burst_regs[EMC_CFG_INDEX], EMC_CFG);  in tegra210_emc_r21021_set_clock()
1710 	emc_writel(emc, next->emc_fdpd_ctrl_cmd_no_ramp,  in tegra210_emc_r21021_set_clock()
1712 	emc_writel(emc, next->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL);  in tegra210_emc_r21021_set_clock()
1721 	emc_writel(emc,  in tegra210_emc_r21021_set_clock()
1732 	emc_writel(emc, EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE0 |  in tegra210_emc_r21021_set_clock()
1741 	emc_writel(emc, EMC_PMACRO_TRAINING_CTRL_0_CH0_TRAINING_E_WRPTR,  in tegra210_emc_r21021_set_clock()
1743 	emc_writel(emc, EMC_PMACRO_TRAINING_CTRL_1_CH1_TRAINING_E_WRPTR,  in tegra210_emc_r21021_set_clock()
1745 	emc_writel(emc, 0, EMC_PMACRO_CFG_PM_GLOBAL_0);  in tegra210_emc_r21021_set_clock()
1761 		emc_writel(emc, value, EMC_CFG_DIG_DLL);  in tegra210_emc_r21021_set_clock()
1765 	emc_writel(emc, next->emc_auto_cal_config, EMC_AUTO_CAL_CONFIG);  in tegra210_emc_r21021_set_clock()