Lines Matching refs:tx_lx_vmode_ctrl2
66 u32 tx_lx_vmode_ctrl2[HDMI_NUM_TX_CHANNEL]; member
336 cfg->tx_lx_vmode_ctrl2[0] = in pll_calculate()
337 cfg->tx_lx_vmode_ctrl2[1] = in pll_calculate()
338 cfg->tx_lx_vmode_ctrl2[2] = 0x0D; in pll_calculate()
340 cfg->tx_lx_vmode_ctrl2[3] = 0x00; in pll_calculate()
348 cfg->tx_lx_vmode_ctrl2[0] = in pll_calculate()
349 cfg->tx_lx_vmode_ctrl2[1] = in pll_calculate()
350 cfg->tx_lx_vmode_ctrl2[2] = 0x0D; in pll_calculate()
351 cfg->tx_lx_vmode_ctrl2[3] = 0x00; in pll_calculate()
357 cfg->tx_lx_vmode_ctrl2[i] = 0x0E; in pll_calculate()
389 DBG("tx_l%d_vmode_ctrl2 = 0x%x", i, cfg->tx_lx_vmode_ctrl2[i]); in pll_calculate()
513 cfg.tx_lx_vmode_ctrl2[i]); in hdmi_8996_pll_set_clk_rate()