Lines Matching refs:HDMI_NUM_TX_CHANNEL
27 #define HDMI_NUM_TX_CHANNEL 4 macro
36 void __iomem *mmio_qserdes_tx[HDMI_NUM_TX_CHANNEL];
42 u32 tx_lx_lane_mode[HDMI_NUM_TX_CHANNEL];
43 u32 tx_lx_tx_band[HDMI_NUM_TX_CHANNEL];
63 u32 tx_lx_tx_drv_lvl[HDMI_NUM_TX_CHANNEL];
64 u32 tx_lx_tx_emp_post1_lvl[HDMI_NUM_TX_CHANNEL];
65 u32 tx_lx_vmode_ctrl1[HDMI_NUM_TX_CHANNEL];
66 u32 tx_lx_vmode_ctrl2[HDMI_NUM_TX_CHANNEL];
67 u32 tx_lx_res_code_lane_tx[HDMI_NUM_TX_CHANNEL];
68 u32 tx_lx_hp_pd_enables[HDMI_NUM_TX_CHANNEL];
317 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) in pll_calculate()
342 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in pll_calculate()
353 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in pll_calculate()
383 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in pll_calculate()
424 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in hdmi_8996_pll_set_clk_rate()
501 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in hdmi_8996_pll_set_clk_rate()
608 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) in hdmi_8996_pll_prepare()
722 for (i = 0; i < HDMI_NUM_TX_CHANNEL; i++) { in msm_hdmi_pll_8996_init()