Lines Matching +full:mt8173 +full:- +full:hdmi +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/arm-smccc.h>
10 #include <linux/hdmi.h>
20 #include <linux/phy/phy.h>
24 #include <sound/hdmi-codec.h>
160 struct phy *phy;
191 static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset)
193 return readl(hdmi->regs + offset);
196 static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val)
198 writel(val, hdmi->regs + offset);
201 static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits)
203 void __iomem *reg = hdmi->regs + offset;
211 static void mtk_hdmi_set_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits)
213 void __iomem *reg = hdmi->regs + offset;
221 static void mtk_hdmi_mask(struct mtk_hdmi *hdmi, u32 offset, u32 val, u32 mask)
223 void __iomem *reg = hdmi->regs + offset;
231 static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black)
233 mtk_hdmi_mask(hdmi, VIDEO_CFG_4, black ? GEN_RGB : NORMAL_PATH,
237 static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable)
242 * MT8173 HDMI hardware has an output control bit to enable/disable HDMI
244 * The ARM trusted firmware provides an API for the HDMI driver to set
245 * this control bit to enable HDMI output in supervisor mode.
247 if (hdmi->conf && hdmi->conf->tz_disabled)
248 regmap_update_bits(hdmi->sys_regmap,
249 hdmi->sys_offset + HDMI_SYS_CFG20,
255 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
257 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
261 static void mtk_hdmi_hw_1p4_version_enable(struct mtk_hdmi *hdmi, bool enable)
263 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
267 static void mtk_hdmi_hw_aud_mute(struct mtk_hdmi *hdmi)
269 mtk_hdmi_set_bits(hdmi, GRL_AUDIO_CFG, AUDIO_ZERO);
272 static void mtk_hdmi_hw_aud_unmute(struct mtk_hdmi *hdmi)
274 mtk_hdmi_clear_bits(hdmi, GRL_AUDIO_CFG, AUDIO_ZERO);
277 static void mtk_hdmi_hw_reset(struct mtk_hdmi *hdmi)
279 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
281 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
283 mtk_hdmi_clear_bits(hdmi, GRL_CFG3, CFG3_CONTROL_PACKET_DELAY);
284 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG1C,
288 static void mtk_hdmi_hw_enable_notice(struct mtk_hdmi *hdmi, bool enable_notice)
290 mtk_hdmi_mask(hdmi, GRL_CFG2, enable_notice ? CFG2_NOTICE_EN : 0,
294 static void mtk_hdmi_hw_write_int_mask(struct mtk_hdmi *hdmi, u32 int_mask)
296 mtk_hdmi_write(hdmi, GRL_INT_MASK, int_mask);
299 static void mtk_hdmi_hw_enable_dvi_mode(struct mtk_hdmi *hdmi, bool enable)
301 mtk_hdmi_mask(hdmi, GRL_CFG1, enable ? CFG1_DVI : 0, CFG1_DVI);
304 static void mtk_hdmi_hw_send_info_frame(struct mtk_hdmi *hdmi, u8 *buffer,
322 dev_dbg(hdmi->dev,
344 dev_err(hdmi->dev, "Unknown infoframe type %d\n", frame_type);
347 mtk_hdmi_clear_bits(hdmi, ctrl_reg, ctrl_frame_en);
348 mtk_hdmi_write(hdmi, GRL_INFOFRM_TYPE, frame_type);
349 mtk_hdmi_write(hdmi, GRL_INFOFRM_VER, frame_ver);
350 mtk_hdmi_write(hdmi, GRL_INFOFRM_LNG, frame_len);
352 mtk_hdmi_write(hdmi, GRL_IFM_PORT, checksum);
354 mtk_hdmi_write(hdmi, GRL_IFM_PORT, frame_data[i]);
356 mtk_hdmi_set_bits(hdmi, ctrl_reg, ctrl_frame_en);
359 static void mtk_hdmi_hw_send_aud_packet(struct mtk_hdmi *hdmi, bool enable)
361 mtk_hdmi_mask(hdmi, GRL_SHIFT_R2, enable ? 0 : AUDIO_PACKET_OFF,
365 static void mtk_hdmi_hw_config_sys(struct mtk_hdmi *hdmi)
367 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
370 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
374 static void mtk_hdmi_hw_set_deep_color_mode(struct mtk_hdmi *hdmi)
376 regmap_update_bits(hdmi->sys_regmap, hdmi->sys_offset + HDMI_SYS_CFG20,
381 static void mtk_hdmi_hw_send_av_mute(struct mtk_hdmi *hdmi)
383 mtk_hdmi_clear_bits(hdmi, GRL_CFG4, CTRL_AVMUTE);
385 mtk_hdmi_set_bits(hdmi, GRL_CFG4, CTRL_AVMUTE);
388 static void mtk_hdmi_hw_send_av_unmute(struct mtk_hdmi *hdmi)
390 mtk_hdmi_mask(hdmi, GRL_CFG4, CFG4_AV_UNMUTE_EN,
393 mtk_hdmi_mask(hdmi, GRL_CFG4, CFG4_AV_UNMUTE_SET,
397 static void mtk_hdmi_hw_ncts_enable(struct mtk_hdmi *hdmi, bool on)
399 mtk_hdmi_mask(hdmi, GRL_CTS_CTRL, on ? 0 : CTS_CTRL_SOFT,
403 static void mtk_hdmi_hw_ncts_auto_write_enable(struct mtk_hdmi *hdmi,
406 mtk_hdmi_mask(hdmi, GRL_CTS_CTRL, enable ? NCTS_WRI_ANYTIME : 0,
410 static void mtk_hdmi_hw_msic_setting(struct mtk_hdmi *hdmi,
413 mtk_hdmi_clear_bits(hdmi, GRL_CFG4, CFG4_MHL_MODE);
415 if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
416 mode->clock == 74250 &&
417 mode->vdisplay == 1080)
418 mtk_hdmi_clear_bits(hdmi, GRL_CFG2, CFG2_MHL_DE_SEL);
420 mtk_hdmi_set_bits(hdmi, GRL_CFG2, CFG2_MHL_DE_SEL);
423 static void mtk_hdmi_hw_aud_set_channel_swap(struct mtk_hdmi *hdmi,
448 mtk_hdmi_mask(hdmi, GRL_CH_SWAP, swap_bit, 0xff);
451 static void mtk_hdmi_hw_aud_set_bit_num(struct mtk_hdmi *hdmi,
469 mtk_hdmi_mask(hdmi, GRL_AOUT_CFG, val, AOUT_BNUM_SEL_MASK);
472 static void mtk_hdmi_hw_aud_set_i2s_fmt(struct mtk_hdmi *hdmi,
477 val = mtk_hdmi_read(hdmi, GRL_CFG0);
501 mtk_hdmi_write(hdmi, GRL_CFG0, val);
504 static void mtk_hdmi_hw_audio_config(struct mtk_hdmi *hdmi, bool dst)
510 mtk_hdmi_clear_bits(hdmi, GRL_AOUT_CFG, HIGH_BIT_RATE_PACKET_ALIGN);
517 mtk_hdmi_mask(hdmi, GRL_AUDIO_CFG, val, mask);
520 static void mtk_hdmi_hw_aud_set_i2s_chan_num(struct mtk_hdmi *hdmi,
558 mtk_hdmi_write(hdmi, GRL_CH_SW0, ch_switch & 0xff);
559 mtk_hdmi_write(hdmi, GRL_CH_SW1, (ch_switch >> 8) & 0xff);
560 mtk_hdmi_write(hdmi, GRL_CH_SW2, (ch_switch >> 16) & 0xff);
561 mtk_hdmi_write(hdmi, GRL_I2S_UV, i2s_uv);
564 static void mtk_hdmi_hw_aud_set_input_type(struct mtk_hdmi *hdmi,
569 val = mtk_hdmi_read(hdmi, GRL_CFG1);
577 mtk_hdmi_write(hdmi, GRL_CFG1, val);
580 static void mtk_hdmi_hw_aud_set_channel_status(struct mtk_hdmi *hdmi,
586 mtk_hdmi_write(hdmi, GRL_I2S_C_STA0 + i * 4, channel_status[i]);
587 mtk_hdmi_write(hdmi, GRL_L_STATUS_0 + i * 4, channel_status[i]);
588 mtk_hdmi_write(hdmi, GRL_R_STATUS_0 + i * 4, channel_status[i]);
591 mtk_hdmi_write(hdmi, GRL_L_STATUS_0 + i * 4, 0);
592 mtk_hdmi_write(hdmi, GRL_R_STATUS_0 + i * 4, 0);
596 static void mtk_hdmi_hw_aud_src_reenable(struct mtk_hdmi *hdmi)
600 val = mtk_hdmi_read(hdmi, GRL_MIX_CTRL);
603 mtk_hdmi_write(hdmi, GRL_MIX_CTRL, val);
606 mtk_hdmi_write(hdmi, GRL_MIX_CTRL, val);
610 static void mtk_hdmi_hw_aud_src_disable(struct mtk_hdmi *hdmi)
614 val = mtk_hdmi_read(hdmi, GRL_MIX_CTRL);
616 mtk_hdmi_write(hdmi, GRL_MIX_CTRL, val);
617 mtk_hdmi_write(hdmi, GRL_SHIFT_L1, 0x00);
620 static void mtk_hdmi_hw_aud_set_mclk(struct mtk_hdmi *hdmi,
625 val = mtk_hdmi_read(hdmi, GRL_CFG5);
648 mtk_hdmi_write(hdmi, GRL_CFG5, val);
656 /* Recommended N values from HDMI specification, tables 7-1 to 7-3 */
668 * hdmi_recommended_n() - Return N value recommended by HDMI specification
677 for (i = 0; i < ARRAY_SIZE(hdmi_rec_n_table) - 1; i++) {
685 return recommended->n[0];
687 return recommended->n[1];
689 return recommended->n[2];
691 return recommended->n[1] * 2;
693 return recommended->n[2] * 2;
695 return recommended->n[1] * 4;
697 return recommended->n[2] * 4;
726 static void do_hdmi_hw_aud_set_ncts(struct mtk_hdmi *hdmi, unsigned int n,
732 mtk_hdmi_write(hdmi, GRL_NCTS, 0);
733 mtk_hdmi_write(hdmi, GRL_NCTS, 0);
734 mtk_hdmi_write(hdmi, GRL_NCTS, 0);
747 mtk_hdmi_write(hdmi, GRL_NCTS, val[i]);
750 static void mtk_hdmi_hw_aud_set_ncts(struct mtk_hdmi *hdmi,
759 dev_dbg(hdmi->dev, "%s: sample_rate=%u, clock=%d, cts=%u, n=%u\n",
762 mtk_hdmi_mask(hdmi, DUMMY_304, AUDIO_I2S_NCTS_SEL_64,
764 do_hdmi_hw_aud_set_ncts(hdmi, n, cts);
837 static int mtk_hdmi_video_change_vpll(struct mtk_hdmi *hdmi, u32 clock)
843 ret = clk_set_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL], clock);
845 dev_err(hdmi->dev, "Failed to set PLL to %u Hz: %d\n", clock,
850 rate = clk_get_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
853 dev_warn(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock,
856 dev_dbg(hdmi->dev, "Want PLL %u Hz, got %lu Hz\n", clock, rate);
858 mtk_hdmi_hw_config_sys(hdmi);
859 mtk_hdmi_hw_set_deep_color_mode(hdmi);
863 static void mtk_hdmi_video_set_display_mode(struct mtk_hdmi *hdmi,
866 mtk_hdmi_hw_reset(hdmi);
867 mtk_hdmi_hw_enable_notice(hdmi, true);
868 mtk_hdmi_hw_write_int_mask(hdmi, 0xff);
869 mtk_hdmi_hw_enable_dvi_mode(hdmi, hdmi->dvi_mode);
870 mtk_hdmi_hw_ncts_auto_write_enable(hdmi, true);
872 mtk_hdmi_hw_msic_setting(hdmi, mode);
876 static void mtk_hdmi_aud_set_input(struct mtk_hdmi *hdmi)
882 mtk_hdmi_hw_aud_set_channel_swap(hdmi, HDMI_AUD_SWAP_LFE_CC);
883 mtk_hdmi_set_bits(hdmi, GRL_MIX_CTRL, MIX_CTRL_FLAT);
885 if (hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_SPDIF &&
886 hdmi->aud_param.aud_codec == HDMI_AUDIO_CODING_TYPE_DST) {
887 mtk_hdmi_hw_aud_set_bit_num(hdmi, HDMI_AUDIO_SAMPLE_SIZE_24);
888 } else if (hdmi->aud_param.aud_i2s_fmt == HDMI_I2S_MODE_LJT_24BIT) {
889 hdmi->aud_param.aud_i2s_fmt = HDMI_I2S_MODE_LJT_16BIT;
892 mtk_hdmi_hw_aud_set_i2s_fmt(hdmi, hdmi->aud_param.aud_i2s_fmt);
893 mtk_hdmi_hw_aud_set_bit_num(hdmi, HDMI_AUDIO_SAMPLE_SIZE_24);
895 dst = ((hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_SPDIF) &&
896 (hdmi->aud_param.aud_codec == HDMI_AUDIO_CODING_TYPE_DST));
897 mtk_hdmi_hw_audio_config(hdmi, dst);
899 if (hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_SPDIF)
902 chan_type = hdmi->aud_param.aud_input_chan_type;
904 mtk_hdmi_hw_aud_set_i2s_chan_num(hdmi, chan_type, chan_count);
905 mtk_hdmi_hw_aud_set_input_type(hdmi, hdmi->aud_param.aud_input_type);
908 static int mtk_hdmi_aud_set_src(struct mtk_hdmi *hdmi,
911 unsigned int sample_rate = hdmi->aud_param.codec_params.sample_rate;
913 mtk_hdmi_hw_ncts_enable(hdmi, false);
914 mtk_hdmi_hw_aud_src_disable(hdmi);
915 mtk_hdmi_clear_bits(hdmi, GRL_CFG2, CFG2_ACLK_INV);
917 if (hdmi->aud_param.aud_input_type == HDMI_AUD_INPUT_I2S) {
926 return -EINVAL;
928 mtk_hdmi_hw_aud_set_mclk(hdmi, hdmi->aud_param.aud_mclk);
936 return -EINVAL;
938 mtk_hdmi_hw_aud_set_mclk(hdmi, HDMI_AUD_MCLK_128FS);
941 mtk_hdmi_hw_aud_set_ncts(hdmi, sample_rate, display_mode->clock);
943 mtk_hdmi_hw_aud_src_reenable(hdmi);
947 static int mtk_hdmi_aud_output_config(struct mtk_hdmi *hdmi,
950 mtk_hdmi_hw_aud_mute(hdmi);
951 mtk_hdmi_hw_send_aud_packet(hdmi, false);
953 mtk_hdmi_aud_set_input(hdmi);
954 mtk_hdmi_aud_set_src(hdmi, display_mode);
955 mtk_hdmi_hw_aud_set_channel_status(hdmi,
956 hdmi->aud_param.codec_params.iec.status);
960 mtk_hdmi_hw_ncts_enable(hdmi, true);
961 mtk_hdmi_hw_send_aud_packet(hdmi, true);
962 mtk_hdmi_hw_aud_unmute(hdmi);
966 static int mtk_hdmi_setup_avi_infoframe(struct mtk_hdmi *hdmi,
974 hdmi->curr_conn, mode);
976 dev_err(hdmi->dev,
983 dev_err(hdmi->dev, "Failed to pack AVI infoframe: %zd\n", err);
987 mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
991 static int mtk_hdmi_setup_spd_infoframe(struct mtk_hdmi *hdmi,
1001 dev_err(hdmi->dev, "Failed to initialize SPD infoframe: %zd\n",
1008 dev_err(hdmi->dev, "Failed to pack SDP infoframe: %zd\n", err);
1012 mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
1016 static int mtk_hdmi_setup_audio_infoframe(struct mtk_hdmi *hdmi)
1024 dev_err(hdmi->dev, "Failed to setup audio infoframe: %zd\n",
1033 hdmi->aud_param.aud_input_chan_type);
1037 dev_err(hdmi->dev, "Failed to pack audio infoframe: %zd\n",
1042 mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
1046 static int mtk_hdmi_setup_vendor_specific_infoframe(struct mtk_hdmi *hdmi,
1054 hdmi->curr_conn, mode);
1056 dev_err(hdmi->dev,
1063 dev_err(hdmi->dev, "Failed to pack vendor infoframe: %zd\n",
1068 mtk_hdmi_hw_send_info_frame(hdmi, buffer, sizeof(buffer));
1072 static int mtk_hdmi_output_init(struct mtk_hdmi *hdmi)
1074 struct hdmi_audio_param *aud_param = &hdmi->aud_param;
1076 hdmi->csp = HDMI_COLORSPACE_RGB;
1077 aud_param->aud_codec = HDMI_AUDIO_CODING_TYPE_PCM;
1078 aud_param->aud_sample_size = HDMI_AUDIO_SAMPLE_SIZE_16;
1079 aud_param->aud_input_type = HDMI_AUD_INPUT_I2S;
1080 aud_param->aud_i2s_fmt = HDMI_I2S_MODE_I2S_24BIT;
1081 aud_param->aud_mclk = HDMI_AUD_MCLK_128FS;
1082 aud_param->aud_input_chan_type = HDMI_AUD_CHAN_TYPE_2_0;
1087 static void mtk_hdmi_audio_enable(struct mtk_hdmi *hdmi)
1089 mtk_hdmi_hw_send_aud_packet(hdmi, true);
1090 hdmi->audio_enable = true;
1093 static void mtk_hdmi_audio_disable(struct mtk_hdmi *hdmi)
1095 mtk_hdmi_hw_send_aud_packet(hdmi, false);
1096 hdmi->audio_enable = false;
1099 static int mtk_hdmi_audio_set_param(struct mtk_hdmi *hdmi,
1102 if (!hdmi->audio_enable) {
1103 dev_err(hdmi->dev, "hdmi audio is in disable state!\n");
1104 return -EINVAL;
1106 dev_dbg(hdmi->dev, "codec:%d, input:%d, channel:%d, fs:%d\n",
1107 param->aud_codec, param->aud_input_type,
1108 param->aud_input_chan_type, param->codec_params.sample_rate);
1109 memcpy(&hdmi->aud_param, param, sizeof(*param));
1110 return mtk_hdmi_aud_output_config(hdmi, &hdmi->mode);
1113 static int mtk_hdmi_output_set_display_mode(struct mtk_hdmi *hdmi,
1118 mtk_hdmi_hw_vid_black(hdmi, true);
1119 mtk_hdmi_hw_aud_mute(hdmi);
1120 mtk_hdmi_hw_send_av_mute(hdmi);
1121 phy_power_off(hdmi->phy);
1123 ret = mtk_hdmi_video_change_vpll(hdmi,
1124 mode->clock * 1000);
1126 dev_err(hdmi->dev, "Failed to set vpll: %d\n", ret);
1129 mtk_hdmi_video_set_display_mode(hdmi, mode);
1131 phy_power_on(hdmi->phy);
1132 mtk_hdmi_aud_output_config(hdmi, mode);
1134 mtk_hdmi_hw_vid_black(hdmi, false);
1135 mtk_hdmi_hw_aud_unmute(hdmi);
1136 mtk_hdmi_hw_send_av_unmute(hdmi);
1148 static int mtk_hdmi_get_all_clk(struct mtk_hdmi *hdmi,
1154 hdmi->clk[i] = of_clk_get_by_name(np,
1156 if (IS_ERR(hdmi->clk[i]))
1157 return PTR_ERR(hdmi->clk[i]);
1162 static int mtk_hdmi_clk_enable_audio(struct mtk_hdmi *hdmi)
1166 ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);
1170 ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_AUD_SPDIF]);
1176 clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);
1180 static void mtk_hdmi_clk_disable_audio(struct mtk_hdmi *hdmi)
1182 clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);
1183 clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_SPDIF]);
1187 mtk_hdmi_update_plugged_status(struct mtk_hdmi *hdmi)
1191 mutex_lock(&hdmi->update_plugged_status_lock);
1192 connected = mtk_cec_hpd_high(hdmi->cec_dev);
1193 if (hdmi->plugged_cb && hdmi->codec_dev)
1194 hdmi->plugged_cb(hdmi->codec_dev, connected);
1195 mutex_unlock(&hdmi->update_plugged_status_lock);
1201 static enum drm_connector_status mtk_hdmi_detect(struct mtk_hdmi *hdmi)
1203 return mtk_hdmi_update_plugged_status(hdmi);
1211 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1214 dev_dbg(hdmi->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
1215 mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode),
1216 !!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000);
1218 next_bridge = drm_bridge_get_next_bridge(&hdmi->bridge);
1228 if (hdmi->conf) {
1229 if (hdmi->conf->cea_modes_only && !drm_match_cea_mode(mode))
1232 if (hdmi->conf->max_mode_clock &&
1233 mode->clock > hdmi->conf->max_mode_clock)
1237 if (mode->clock < 27000)
1239 if (mode->clock > 297000)
1247 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1249 if (hdmi && hdmi->bridge.encoder && hdmi->bridge.encoder->dev) {
1252 status = mtk_hdmi_detect(hdmi);
1253 drm_helper_hpd_irq_event(hdmi->bridge.encoder->dev);
1254 drm_bridge_hpd_notify(&hdmi->bridge, status);
1264 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1266 return mtk_hdmi_detect(hdmi);
1272 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1275 if (!hdmi->ddc_adpt)
1277 edid = drm_get_edid(connector, hdmi->ddc_adpt);
1280 hdmi->dvi_mode = !drm_detect_monitor_audio(edid);
1287 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1293 return -EINVAL;
1296 if (hdmi->next_bridge) {
1297 ret = drm_bridge_attach(bridge->encoder, hdmi->next_bridge,
1303 mtk_cec_set_hpd_event(hdmi->cec_dev, mtk_hdmi_hpd_event, hdmi->dev);
1318 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1320 if (!hdmi->enabled)
1323 phy_power_off(hdmi->phy);
1324 clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);
1325 clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
1327 hdmi->curr_conn = NULL;
1329 hdmi->enabled = false;
1335 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1337 if (!hdmi->powered)
1340 mtk_hdmi_hw_1p4_version_enable(hdmi, true);
1341 mtk_hdmi_hw_make_reg_writable(hdmi, false);
1343 hdmi->powered = false;
1350 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1352 dev_dbg(hdmi->dev, "cur info: name:%s, hdisplay:%d\n",
1353 adjusted_mode->name, adjusted_mode->hdisplay);
1354 dev_dbg(hdmi->dev, "hsync_start:%d,hsync_end:%d, htotal:%d",
1355 adjusted_mode->hsync_start, adjusted_mode->hsync_end,
1356 adjusted_mode->htotal);
1357 dev_dbg(hdmi->dev, "hskew:%d, vdisplay:%d\n",
1358 adjusted_mode->hskew, adjusted_mode->vdisplay);
1359 dev_dbg(hdmi->dev, "vsync_start:%d, vsync_end:%d, vtotal:%d",
1360 adjusted_mode->vsync_start, adjusted_mode->vsync_end,
1361 adjusted_mode->vtotal);
1362 dev_dbg(hdmi->dev, "vscan:%d, flag:%d\n",
1363 adjusted_mode->vscan, adjusted_mode->flags);
1365 drm_mode_copy(&hdmi->mode, adjusted_mode);
1371 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1373 mtk_hdmi_hw_make_reg_writable(hdmi, true);
1374 mtk_hdmi_hw_1p4_version_enable(hdmi, true);
1376 hdmi->powered = true;
1379 static void mtk_hdmi_send_infoframe(struct mtk_hdmi *hdmi,
1382 mtk_hdmi_setup_audio_infoframe(hdmi);
1383 mtk_hdmi_setup_avi_infoframe(hdmi, mode);
1384 mtk_hdmi_setup_spd_infoframe(hdmi, "mediatek", "On-chip HDMI");
1385 if (mode->flags & DRM_MODE_FLAG_3D_MASK)
1386 mtk_hdmi_setup_vendor_specific_infoframe(hdmi, mode);
1392 struct drm_atomic_state *state = old_state->base.state;
1393 struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
1396 hdmi->curr_conn = drm_atomic_get_new_connector_for_encoder(state,
1397 bridge->encoder);
1399 mtk_hdmi_output_set_display_mode(hdmi, &hdmi->mode);
1400 clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
1401 clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);
1402 phy_power_on(hdmi->phy);
1403 mtk_hdmi_send_infoframe(hdmi, &hdmi->mode);
1405 hdmi->enabled = true;
1424 static int mtk_hdmi_dt_parse_pdata(struct mtk_hdmi *hdmi,
1427 struct device *dev = &pdev->dev;
1428 struct device_node *np = dev->of_node;
1435 ret = mtk_hdmi_get_all_clk(hdmi, np);
1437 if (ret != -EPROBE_DEFER)
1443 /* The CEC module handles HDMI hotplug detection */
1444 cec_np = of_get_compatible_child(np->parent, "mediatek,mt8173-cec");
1447 return -EINVAL;
1452 dev_err(hdmi->dev, "Waiting for CEC device %pOF\n",
1455 return -EPROBE_DEFER;
1458 hdmi->cec_dev = &cec_pdev->dev;
1461 * The mediatek,syscon-hdmi property contains a phandle link to the
1465 regmap = syscon_regmap_lookup_by_phandle(np, "mediatek,syscon-hdmi");
1466 ret = of_property_read_u32_index(np, "mediatek,syscon-hdmi", 1,
1467 &hdmi->sys_offset);
1476 hdmi->sys_regmap = regmap;
1479 hdmi->regs = devm_ioremap_resource(dev, mem);
1480 if (IS_ERR(hdmi->regs)) {
1481 ret = PTR_ERR(hdmi->regs);
1487 ret = -EINVAL;
1491 if (!of_device_is_compatible(remote, "hdmi-connector")) {
1492 hdmi->next_bridge = of_drm_find_bridge(remote);
1493 if (!hdmi->next_bridge) {
1496 ret = -EPROBE_DEFER;
1501 i2c_np = of_parse_phandle(remote, "ddc-i2c-bus", 0);
1503 dev_err(dev, "Failed to find ddc-i2c-bus node in %pOF\n",
1506 ret = -EINVAL;
1511 hdmi->ddc_adpt = of_find_i2c_adapter_by_node(i2c_np);
1513 if (!hdmi->ddc_adpt) {
1515 ret = -EINVAL;
1521 put_device(hdmi->cec_dev);
1526 * HDMI audio codec callbacks
1533 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1535 unsigned int chan = params->cea.channels;
1537 dev_dbg(hdmi->dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
1538 params->sample_rate, params->sample_width, chan);
1540 if (!hdmi->bridge.encoder)
1541 return -ENODEV;
1557 dev_err(hdmi->dev, "channel[%d] not supported!\n", chan);
1558 return -EINVAL;
1561 switch (params->sample_rate) {
1571 dev_err(hdmi->dev, "rate[%d] not supported!\n",
1572 params->sample_rate);
1573 return -EINVAL;
1576 switch (daifmt->fmt) {
1590 dev_err(hdmi->dev, "%s: Invalid DAI format %d\n", __func__,
1591 daifmt->fmt);
1592 return -EINVAL;
1598 mtk_hdmi_audio_set_param(hdmi, &hdmi_params);
1605 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1607 mtk_hdmi_audio_enable(hdmi);
1614 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1616 mtk_hdmi_audio_disable(hdmi);
1623 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1626 mtk_hdmi_hw_aud_mute(hdmi);
1628 mtk_hdmi_hw_aud_unmute(hdmi);
1635 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1637 if (hdmi->enabled)
1638 memcpy(buf, hdmi->curr_conn->eld, min(sizeof(hdmi->curr_conn->eld), len));
1648 struct mtk_hdmi *hdmi = data;
1650 mutex_lock(&hdmi->update_plugged_status_lock);
1651 hdmi->plugged_cb = fn;
1652 hdmi->codec_dev = codec_dev;
1653 mutex_unlock(&hdmi->update_plugged_status_lock);
1655 mtk_hdmi_update_plugged_status(hdmi);
1677 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1682 .data = hdmi,
1686 hdmi->audio_pdev = platform_device_register_data(dev,
1691 if (IS_ERR(hdmi->audio_pdev))
1692 return PTR_ERR(hdmi->audio_pdev);
1695 hdmi->audio_pdev);
1699 DRM_INFO("%s driver bound to HDMI\n", HDMI_CODEC_DRV_NAME);
1705 struct mtk_hdmi *hdmi;
1706 struct device *dev = &pdev->dev;
1709 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
1710 if (!hdmi)
1711 return -ENOMEM;
1713 hdmi->dev = dev;
1714 hdmi->conf = of_device_get_match_data(dev);
1716 ret = mtk_hdmi_dt_parse_pdata(hdmi, pdev);
1720 hdmi->phy = devm_phy_get(dev, "hdmi");
1721 if (IS_ERR(hdmi->phy)) {
1722 ret = PTR_ERR(hdmi->phy);
1723 dev_err(dev, "Failed to get HDMI PHY: %d\n", ret);
1727 mutex_init(&hdmi->update_plugged_status_lock);
1728 platform_set_drvdata(pdev, hdmi);
1730 ret = mtk_hdmi_output_init(hdmi);
1732 dev_err(dev, "Failed to initialize hdmi output\n");
1742 hdmi->bridge.funcs = &mtk_hdmi_bridge_funcs;
1743 hdmi->bridge.of_node = pdev->dev.of_node;
1744 hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID
1746 hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
1747 drm_bridge_add(&hdmi->bridge);
1749 ret = mtk_hdmi_clk_enable_audio(hdmi);
1758 drm_bridge_remove(&hdmi->bridge);
1764 struct mtk_hdmi *hdmi = platform_get_drvdata(pdev);
1766 drm_bridge_remove(&hdmi->bridge);
1767 mtk_hdmi_clk_disable_audio(hdmi);
1773 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1775 mtk_hdmi_clk_disable_audio(hdmi);
1782 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1785 ret = mtk_hdmi_clk_enable_audio(hdmi);
1787 dev_err(dev, "hdmi resume failed!\n");
1807 { .compatible = "mediatek,mt2701-hdmi",
1810 { .compatible = "mediatek,mt8167-hdmi",
1813 { .compatible = "mediatek,mt8173-hdmi",
1823 .name = "mediatek-drm-hdmi",
1851 MODULE_DESCRIPTION("MediaTek HDMI Driver");