Lines Matching +full:lvds +full:- +full:encoder
2 * Copyright © 2006-2007 Intel Corporation
56 /* Private structure for the integrated LVDS support */
84 static struct intel_lvds_encoder *to_lvds_encoder(struct intel_encoder *encoder) in to_lvds_encoder() argument
86 return container_of(encoder, struct intel_lvds_encoder, base); in to_lvds_encoder()
105 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, in intel_lvds_get_hw_state() argument
108 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_lvds_get_hw_state()
109 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); in intel_lvds_get_hw_state()
113 wakeref = intel_display_power_get_if_enabled(i915, encoder->power_domain); in intel_lvds_get_hw_state()
117 ret = intel_lvds_port_enabled(i915, lvds_encoder->reg, pipe); in intel_lvds_get_hw_state()
119 intel_display_power_put(i915, encoder->power_domain, wakeref); in intel_lvds_get_hw_state()
124 static void intel_lvds_get_config(struct intel_encoder *encoder, in intel_lvds_get_config() argument
127 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_get_config()
128 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); in intel_lvds_get_config()
131 crtc_state->output_types |= BIT(INTEL_OUTPUT_LVDS); in intel_lvds_get_config()
133 tmp = intel_de_read(dev_priv, lvds_encoder->reg); in intel_lvds_get_config()
143 crtc_state->hw.adjusted_mode.flags |= flags; in intel_lvds_get_config()
146 crtc_state->gmch_pfit.lvds_border_bits = in intel_lvds_get_config()
153 crtc_state->gmch_pfit.control |= tmp & PFIT_PANEL_8TO6_DITHER_ENABLE; in intel_lvds_get_config()
156 crtc_state->hw.adjusted_mode.crtc_clock = crtc_state->port_clock; in intel_lvds_get_config()
164 pps->powerdown_on_reset = intel_de_read(dev_priv, PP_CONTROL(0)) & PANEL_POWER_RESET; in intel_lvds_pps_get_hw_state()
167 pps->port = REG_FIELD_GET(PANEL_PORT_SELECT_MASK, val); in intel_lvds_pps_get_hw_state()
168 pps->t1_t2 = REG_FIELD_GET(PANEL_POWER_UP_DELAY_MASK, val); in intel_lvds_pps_get_hw_state()
169 pps->t5 = REG_FIELD_GET(PANEL_LIGHT_ON_DELAY_MASK, val); in intel_lvds_pps_get_hw_state()
172 pps->t3 = REG_FIELD_GET(PANEL_POWER_DOWN_DELAY_MASK, val); in intel_lvds_pps_get_hw_state()
173 pps->tx = REG_FIELD_GET(PANEL_LIGHT_OFF_DELAY_MASK, val); in intel_lvds_pps_get_hw_state()
176 pps->divider = REG_FIELD_GET(PP_REFERENCE_DIVIDER_MASK, val); in intel_lvds_pps_get_hw_state()
180 * too short power-cycle delay due to the asynchronous programming of in intel_lvds_pps_get_hw_state()
184 val--; in intel_lvds_pps_get_hw_state()
186 pps->t4 = val * 1000; in intel_lvds_pps_get_hw_state()
189 pps->t1_t2 == 0 && pps->t5 == 0 && pps->t3 == 0 && pps->tx == 0) { in intel_lvds_pps_get_hw_state()
190 drm_dbg_kms(&dev_priv->drm, in intel_lvds_pps_get_hw_state()
194 pps->t1_t2 = 40 * 10; in intel_lvds_pps_get_hw_state()
195 pps->t5 = 200 * 10; in intel_lvds_pps_get_hw_state()
197 pps->t3 = 35 * 10; in intel_lvds_pps_get_hw_state()
198 pps->tx = 200 * 10; in intel_lvds_pps_get_hw_state()
201 drm_dbg(&dev_priv->drm, "LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d " in intel_lvds_pps_get_hw_state()
203 pps->t1_t2, pps->t3, pps->t4, pps->t5, pps->tx, in intel_lvds_pps_get_hw_state()
204 pps->divider, pps->port, pps->powerdown_on_reset); in intel_lvds_pps_get_hw_state()
213 drm_WARN_ON(&dev_priv->drm, in intel_lvds_pps_init_hw()
215 if (pps->powerdown_on_reset) in intel_lvds_pps_init_hw()
220 REG_FIELD_PREP(PANEL_PORT_SELECT_MASK, pps->port) | in intel_lvds_pps_init_hw()
221 REG_FIELD_PREP(PANEL_POWER_UP_DELAY_MASK, pps->t1_t2) | in intel_lvds_pps_init_hw()
222 REG_FIELD_PREP(PANEL_LIGHT_ON_DELAY_MASK, pps->t5)); in intel_lvds_pps_init_hw()
225 REG_FIELD_PREP(PANEL_POWER_DOWN_DELAY_MASK, pps->t3) | in intel_lvds_pps_init_hw()
226 REG_FIELD_PREP(PANEL_LIGHT_OFF_DELAY_MASK, pps->tx)); in intel_lvds_pps_init_hw()
229 REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | in intel_lvds_pps_init_hw()
230 REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(pps->t4, 1000) + 1)); in intel_lvds_pps_init_hw()
234 struct intel_encoder *encoder, in intel_pre_enable_lvds() argument
238 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); in intel_pre_enable_lvds()
239 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_pre_enable_lvds()
240 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_pre_enable_lvds()
241 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_pre_enable_lvds()
242 enum pipe pipe = crtc->pipe; in intel_pre_enable_lvds()
247 assert_shared_dpll_disabled(i915, crtc_state->shared_dpll); in intel_pre_enable_lvds()
252 intel_lvds_pps_init_hw(i915, &lvds_encoder->init_pps); in intel_pre_enable_lvds()
254 temp = lvds_encoder->init_lvds_val; in intel_pre_enable_lvds()
267 temp |= crtc_state->gmch_pfit.lvds_border_bits; in intel_pre_enable_lvds()
270 * Set the B0-B3 data pairs corresponding to whether we're going to in intel_pre_enable_lvds()
271 * set the DPLLs for dual-channel mode or not. in intel_pre_enable_lvds()
273 if (lvds_encoder->is_dual_link) in intel_pre_enable_lvds()
279 * It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) in intel_pre_enable_lvds()
285 temp |= lvds_encoder->a3_power; in intel_pre_enable_lvds()
288 * Set the dithering flag on LVDS as needed, note that there is no in intel_pre_enable_lvds()
289 * special lvds dither control bit on pch-split platforms, dithering is in intel_pre_enable_lvds()
294 * Bspec wording suggests that LVDS port dithering only exists in intel_pre_enable_lvds()
297 if (crtc_state->dither && crtc_state->pipe_bpp == 18) in intel_pre_enable_lvds()
303 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) in intel_pre_enable_lvds()
305 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) in intel_pre_enable_lvds()
308 intel_de_write(i915, lvds_encoder->reg, temp); in intel_pre_enable_lvds()
315 struct intel_encoder *encoder, in intel_enable_lvds() argument
319 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); in intel_enable_lvds()
320 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_enable_lvds()
322 intel_de_rmw(dev_priv, lvds_encoder->reg, 0, LVDS_PORT_EN); in intel_enable_lvds()
325 intel_de_posting_read(dev_priv, lvds_encoder->reg); in intel_enable_lvds()
328 drm_err(&dev_priv->drm, in intel_enable_lvds()
335 struct intel_encoder *encoder, in intel_disable_lvds() argument
339 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); in intel_disable_lvds()
340 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_disable_lvds()
344 drm_err(&dev_priv->drm, in intel_disable_lvds()
347 intel_de_rmw(dev_priv, lvds_encoder->reg, LVDS_PORT_EN, 0); in intel_disable_lvds()
348 intel_de_posting_read(dev_priv, lvds_encoder->reg); in intel_disable_lvds()
352 struct intel_encoder *encoder, in gmch_disable_lvds() argument
359 intel_disable_lvds(state, encoder, old_crtc_state, old_conn_state); in gmch_disable_lvds()
363 struct intel_encoder *encoder, in pch_disable_lvds() argument
371 struct intel_encoder *encoder, in pch_post_disable_lvds() argument
375 intel_disable_lvds(state, encoder, old_crtc_state, old_conn_state); in pch_post_disable_lvds()
378 static void intel_lvds_shutdown(struct intel_encoder *encoder) in intel_lvds_shutdown() argument
380 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_lvds_shutdown()
383 drm_err(&dev_priv->drm, in intel_lvds_shutdown()
392 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_lvds_mode_valid()
395 int max_pixclk = to_i915(connector->base.dev)->max_dotclk_freq; in intel_lvds_mode_valid()
402 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_lvds_mode_valid()
409 if (fixed_mode->clock > max_pixclk) in intel_lvds_mode_valid()
415 static int intel_lvds_compute_config(struct intel_encoder *encoder, in intel_lvds_compute_config() argument
419 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_lvds_compute_config()
420 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); in intel_lvds_compute_config()
421 struct intel_connector *connector = lvds_encoder->attached_connector; in intel_lvds_compute_config()
422 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_lvds_compute_config()
423 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_lvds_compute_config()
428 if (DISPLAY_VER(i915) < 4 && crtc->pipe == 0) { in intel_lvds_compute_config()
429 drm_err(&i915->drm, "Can't support LVDS on pipe A\n"); in intel_lvds_compute_config()
430 return -EINVAL; in intel_lvds_compute_config()
433 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP) in intel_lvds_compute_config()
438 if (lvds_bpp != crtc_state->pipe_bpp && !crtc_state->bw_constrained) { in intel_lvds_compute_config()
439 drm_dbg_kms(&i915->drm, in intel_lvds_compute_config()
440 "forcing display bpp (was %d) to LVDS (%d)\n", in intel_lvds_compute_config()
441 crtc_state->pipe_bpp, lvds_bpp); in intel_lvds_compute_config()
442 crtc_state->pipe_bpp = lvds_bpp; in intel_lvds_compute_config()
445 crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_lvds_compute_config()
446 crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_lvds_compute_config()
458 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_lvds_compute_config()
459 return -EINVAL; in intel_lvds_compute_config()
462 crtc_state->has_pch_encoder = true; in intel_lvds_compute_config()
483 const struct drm_edid *fixed_edid = connector->panel.fixed_edid; in intel_lvds_get_modes()
487 drm_edid_connector_update(&connector->base, fixed_edid); in intel_lvds_get_modes()
489 return drm_edid_connector_add_modes(&connector->base); in intel_lvds_get_modes()
519 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); in intel_no_lvds_dmi_callback()
523 /* These systems claim to have LVDS, but really don't */
543 .ident = "MSI IM-945GSE-A",
570 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
578 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
583 .ident = "AOpen i915GMm-HFS",
586 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
591 .ident = "AOpen i45GMx-I",
594 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
599 .ident = "Aopen i945GTt-VFA",
630 .ident = "Asus AT5NM10T-I",
633 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
638 .ident = "Hewlett-Packard HP t5740",
640 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
646 .ident = "Hewlett-Packard t5745",
648 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
654 .ident = "Hewlett-Packard st5747",
656 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
664 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
665 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
670 .ident = "Gigabyte GA-D525TUD",
678 .ident = "Supermicro X7SPA-H",
681 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
738 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); in intel_dual_link_lvds_callback()
772 struct intel_encoder *encoder; in intel_get_lvds_encoder() local
774 for_each_intel_encoder(&i915->drm, encoder) { in intel_get_lvds_encoder()
775 if (encoder->type == INTEL_OUTPUT_LVDS) in intel_get_lvds_encoder()
776 return encoder; in intel_get_lvds_encoder()
784 struct intel_encoder *encoder = intel_get_lvds_encoder(i915); in intel_is_dual_link_lvds() local
786 return encoder && to_lvds_encoder(encoder)->is_dual_link; in intel_is_dual_link_lvds()
791 struct drm_i915_private *i915 = to_i915(lvds_encoder->base.base.dev); in compute_is_dual_link_lvds()
792 struct intel_connector *connector = lvds_encoder->attached_connector; in compute_is_dual_link_lvds()
798 if (i915->params.lvds_channel_mode > 0) in compute_is_dual_link_lvds()
799 return i915->params.lvds_channel_mode == 2; in compute_is_dual_link_lvds()
801 /* single channel LVDS is limited to 112 MHz */ in compute_is_dual_link_lvds()
802 if (fixed_mode->clock > 112999) in compute_is_dual_link_lvds()
809 * BIOS should set the proper LVDS register value at boot, but in compute_is_dual_link_lvds()
811 * we need to check "the value to be set" in VBT when LVDS in compute_is_dual_link_lvds()
814 val = intel_de_read(i915, lvds_encoder->reg); in compute_is_dual_link_lvds()
820 val = connector->panel.vbt.bios_lvds_val; in compute_is_dual_link_lvds()
831 * intel_lvds_init - setup LVDS connectors on this device
834 * Create the connector, register the LVDS DDC bus, and try to figure out what
835 * modes we can display on the LVDS panel (if present).
842 struct intel_encoder *encoder; in intel_lvds_init() local
844 u32 lvds; in intel_lvds_init() local
847 /* Skip init on machines we know falsely report LVDS */ in intel_lvds_init()
849 drm_WARN(&i915->drm, !i915->display.vbt.int_lvds_support, in intel_lvds_init()
850 "Useless DMI match. Internal LVDS support disabled by VBT\n"); in intel_lvds_init()
854 if (!i915->display.vbt.int_lvds_support) { in intel_lvds_init()
855 drm_dbg_kms(&i915->drm, in intel_lvds_init()
856 "Internal LVDS support disabled by VBT\n"); in intel_lvds_init()
863 lvds_reg = LVDS; in intel_lvds_init()
865 lvds = intel_de_read(i915, lvds_reg); in intel_lvds_init()
868 if ((lvds & LVDS_DETECTED) == 0) in intel_lvds_init()
874 if ((lvds & LVDS_PORT_EN) == 0) { in intel_lvds_init()
875 drm_dbg_kms(&i915->drm, in intel_lvds_init()
876 "LVDS is not present in VBT\n"); in intel_lvds_init()
879 drm_dbg_kms(&i915->drm, in intel_lvds_init()
880 "LVDS is not present in VBT, but enabled anyway\n"); in intel_lvds_init()
893 lvds_encoder->attached_connector = connector; in intel_lvds_init()
894 encoder = &lvds_encoder->base; in intel_lvds_init()
896 drm_connector_init(&i915->drm, &connector->base, &intel_lvds_connector_funcs, in intel_lvds_init()
899 drm_encoder_init(&i915->drm, &encoder->base, &intel_lvds_enc_funcs, in intel_lvds_init()
900 DRM_MODE_ENCODER_LVDS, "LVDS"); in intel_lvds_init()
902 encoder->enable = intel_enable_lvds; in intel_lvds_init()
903 encoder->pre_enable = intel_pre_enable_lvds; in intel_lvds_init()
904 encoder->compute_config = intel_lvds_compute_config; in intel_lvds_init()
906 encoder->disable = pch_disable_lvds; in intel_lvds_init()
907 encoder->post_disable = pch_post_disable_lvds; in intel_lvds_init()
909 encoder->disable = gmch_disable_lvds; in intel_lvds_init()
911 encoder->get_hw_state = intel_lvds_get_hw_state; in intel_lvds_init()
912 encoder->get_config = intel_lvds_get_config; in intel_lvds_init()
913 encoder->update_pipe = intel_backlight_update; in intel_lvds_init()
914 encoder->shutdown = intel_lvds_shutdown; in intel_lvds_init()
915 connector->get_hw_state = intel_connector_get_hw_state; in intel_lvds_init()
917 intel_connector_attach_encoder(connector, encoder); in intel_lvds_init()
919 encoder->type = INTEL_OUTPUT_LVDS; in intel_lvds_init()
920 encoder->power_domain = POWER_DOMAIN_PORT_OTHER; in intel_lvds_init()
921 encoder->port = PORT_NONE; in intel_lvds_init()
922 encoder->cloneable = 0; in intel_lvds_init()
924 encoder->pipe_mask = BIT(PIPE_B); in intel_lvds_init()
926 encoder->pipe_mask = ~0; in intel_lvds_init()
928 drm_connector_helper_add(&connector->base, &intel_lvds_connector_helper_funcs); in intel_lvds_init()
929 connector->base.display_info.subpixel_order = SubPixelHorizontalRGB; in intel_lvds_init()
931 lvds_encoder->reg = lvds_reg; in intel_lvds_init()
933 intel_lvds_add_properties(&connector->base); in intel_lvds_init()
935 intel_lvds_pps_get_hw_state(i915, &lvds_encoder->init_pps); in intel_lvds_init()
936 lvds_encoder->init_lvds_val = lvds; in intel_lvds_init()
939 * LVDS discovery: in intel_lvds_init()
942 * 3) check to see if LVDS is already on in intel_lvds_init()
950 mutex_lock(&i915->drm.mode_config.mutex); in intel_lvds_init()
952 drm_edid = drm_edid_read_switcheroo(&connector->base, in intel_lvds_init()
955 drm_edid = drm_edid_read_ddc(&connector->base, in intel_lvds_init()
959 if (drm_edid_connector_update(&connector->base, drm_edid) || in intel_lvds_init()
960 !drm_edid_connector_add_modes(&connector->base)) { in intel_lvds_init()
961 drm_edid_connector_update(&connector->base, NULL); in intel_lvds_init()
963 drm_edid = ERR_PTR(-EINVAL); in intel_lvds_init()
966 drm_edid = ERR_PTR(-ENOENT); in intel_lvds_init()
968 intel_bios_init_panel_late(i915, &connector->panel, NULL, in intel_lvds_init()
984 intel_panel_add_encoder_fixed_mode(connector, encoder); in intel_lvds_init()
986 mutex_unlock(&i915->drm.mode_config.mutex); in intel_lvds_init()
996 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); in intel_lvds_init()
997 drm_dbg_kms(&i915->drm, "detected %s-link lvds configuration\n", in intel_lvds_init()
998 lvds_encoder->is_dual_link ? "dual" : "single"); in intel_lvds_init()
1000 lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK; in intel_lvds_init()
1005 drm_dbg_kms(&i915->drm, "No LVDS modes found, disabling.\n"); in intel_lvds_init()
1006 drm_connector_cleanup(&connector->base); in intel_lvds_init()
1007 drm_encoder_cleanup(&encoder->base); in intel_lvds_init()