Lines Matching defs:id
179 #define SRI(reg_name, block, id)\ argument
182 #define SRI2(reg_name, block, id)\ argument
185 #define SRII(reg_name, block, id)\ argument
189 #define DCCG_SRII(reg_name, block, id)\ argument
193 #define VUPDATE_SRII(reg_name, block, id)\ argument
197 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
201 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
204 #define SRII_MPC_RMU(reg_name, block, id)\ argument
220 #define vmid_regs(id)\ argument
274 #define vpg_regs(id)\ argument
306 #define afmt_regs(id)\ argument
338 #define audio_regs(id)\ argument
369 #define stream_enc_regs(id)\ argument
440 enum clock_source_id id, const struct dce110_clk_src_regs *regs, bool dp_clk_src) in dcn302_clock_source_create()
482 #define hubp_regs(id)\ argument
516 #define dpp_regs(id)\ argument
550 #define opp_regs(id)\ argument
582 #define optc_regs(id)\ argument
658 #define dsc_regsDCN20(id)\ argument
690 #define dwbc_regs_dcn3(id)\ argument
725 #define mcif_wb_regs_dcn3(id)\ argument
760 #define aux_engine_regs(id)\ argument
797 #define i2c_inst_regs(id) { I2C_HW_ENGINE_COMMON_REG_LIST(id) } argument
839 #define link_regs(id, phyid)\ argument
865 #define aux_regs(id)\ argument
876 #define hpd_regs(id)\ argument
1174 #define abm_regs(id)\ argument