104 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \  argument
107 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \  argument
112 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \  argument
115 #define imx_clk_pfd(name, parent_name, reg, idx) \  argument
118 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \  argument
121 #define imx_clk_fixed(name, rate) \  argument
124 #define imx_clk_fixed_factor(name, parent, mult, div) \  argument
127 #define imx_clk_divider(name, parent, reg, shift, width) \  argument
130 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \  argument
133 #define imx_clk_gate(name, parent, reg, shift) \  argument
136 #define imx_clk_gate_dis(name, parent, reg, shift) \  argument
139 #define imx_clk_gate2(name, parent, reg, shift) \  argument
142 #define imx_clk_gate2_cgr(name, parent, reg, shift, cgr_val) \  argument
145 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \  argument
148 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \  argument
151 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
154 #define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
157 #define imx_clk_pllv1(type, name, parent, base) \  argument
160 #define imx_clk_pllv2(name, parent, base) \  argument
163 #define imx_clk_hw_gate(name, parent, reg, shift) \  argument
166 #define imx_clk_hw_gate2(name, parent, reg, shift) \  argument
169 #define imx_clk_hw_gate_dis(name, parent, reg, shift) \  argument
172 #define imx_clk_hw_gate_dis_flags(name, parent, reg, shift, flags) \  argument
175 #define imx_clk_hw_gate_flags(name, parent, reg, shift, flags) \  argument
178 #define imx_clk_hw_gate2_flags(name, parent, reg, shift, flags) \  argument
181 #define imx_clk_hw_gate2_shared(name, parent, reg, shift, shared_count) \  argument
184 #define imx_clk_hw_gate2_shared2(name, parent, reg, shift, shared_count) \  argument
187 #define imx_clk_hw_gate3(name, parent, reg, shift) \  argument
190 #define imx_clk_hw_gate3_flags(name, parent, reg, shift, flags) \  argument
193 #define imx_clk_hw_gate4(name, parent, reg, shift) \  argument
196 #define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \  argument
199 #define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \  argument
202 #define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \  argument
205 #define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
208 #define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \  argument
211 #define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
214 #define imx_clk_hw_divider(name, parent, reg, shift, width) \  argument
217 #define imx_clk_hw_divider2(name, parent, reg, shift, width) \  argument
221 #define imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags) \  argument
224 #define imx_clk_hw_pll14xx(name, parent_name, base, pll_clk) \  argument
344 static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)  in imx_clk_hw_fixed()
349 static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name,  in imx_clk_hw_fixed_factor()
356 static inline struct clk_hw *imx_clk_hw_divider_closest(const char *name,  in imx_clk_hw_divider_closest()
365 static inline struct clk_hw *__imx_clk_hw_divider(const char *name,  in __imx_clk_hw_divider()
374 static inline struct clk_hw *__imx_clk_hw_gate(const char *name, const char *parent,  in __imx_clk_hw_gate()
383 static inline struct clk_hw *__imx_clk_hw_gate2(const char *name, const char *parent,  in __imx_clk_hw_gate2()
392 static inline struct clk_hw *__imx_clk_hw_mux(const char *name, void __iomem *reg,  in __imx_clk_hw_mux()
425 #define _imx8m_clk_hw_composite(name, parent_names, reg, composite_flags, flags) \  argument
429 #define imx8m_clk_hw_composite(name, parent_names, reg) \  argument
433 #define imx8m_clk_hw_composite_flags(name, parent_names, reg, flags) \  argument
437 #define imx8m_clk_hw_composite_critical(name, parent_names, reg) \  argument
441 #define imx8m_clk_hw_composite_bus(name, parent_names, reg)	\  argument
445 #define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg)	\  argument
449 #define imx8m_clk_hw_composite_core(name, parent_names, reg)	\  argument
453 #define imx8m_clk_hw_fw_managed_composite(name, parent_names, reg) \  argument
458 #define imx8m_clk_hw_fw_managed_composite_critical(name, parent_names, reg) \  argument
469 #define imx93_clk_composite(name, parent_names, num_parents, reg, domain_id) \  argument