Lines Matching +full:lan966x +full:- +full:gck

1 # SPDX-License-Identifier: GPL-2.0
59 	  Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
88 	  These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 	  multi-function device has one fixed-rate oscillator, clocked
129 	  be pre-programmed to support other configurations and features not yet
178 	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
196 	  For example, the CDCE925 contains two PLLs with spread-spectrum
206 	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
251 	tristate "Generic Clock Controller driver for LAN966X SoC"
256 	  This driver provides support for Generic Clock Controller(GCK) on
257 	  LAN966X SoC. GCK generates and supplies clock to various peripherals
277 	  clock. These multi-function devices have two (S2MPS14) or three
278 	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
293 	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
319 	  Support for the APM X-Gene SoC reference, PLL, and device clocks.
337 	bool "Clock driver for Loongson-2 SoC"
340           This driver provides support for clock controller on Loongson-2 SoC.
343           Say Y here to support Loongson-2 SoC clock driver.
372 	tristate "Clock driver for Renesas 9-series PCIe clock generators"
377 	  This driver supports the Renesas 9-series PCIe clock generator
466 	  Support for the Canaan Kendryte K210 RISC-V SoC clocks.
480 source "drivers/clk/baikal-t1/Kconfig"
504 source "drivers/clk/sunxi-ng/Kconfig"