Lines Matching refs:csr_core
85 void __iomem *csr_core; /* Core CSR address of IP */ member
664 writel(0, ctx->csr_core + INTSTATUSMASK); in xgene_ahci_hw_init()
665 val = readl(ctx->csr_core + INTSTATUSMASK); /* Force a barrier */ in xgene_ahci_hw_init()
669 writel(0x0, ctx->csr_core + ERRINTSTATUSMASK); in xgene_ahci_hw_init()
670 readl(ctx->csr_core + ERRINTSTATUSMASK); /* Force a barrier */ in xgene_ahci_hw_init()
675 writel(0xffffffff, ctx->csr_core + SLVRDERRATTRIBUTES); in xgene_ahci_hw_init()
676 writel(0xffffffff, ctx->csr_core + SLVWRERRATTRIBUTES); in xgene_ahci_hw_init()
677 writel(0xffffffff, ctx->csr_core + MSTRDERRATTRIBUTES); in xgene_ahci_hw_init()
678 writel(0xffffffff, ctx->csr_core + MSTWRERRATTRIBUTES); in xgene_ahci_hw_init()
681 val = readl(ctx->csr_core + BUSCTLREG); in xgene_ahci_hw_init()
684 writel(val, ctx->csr_core + BUSCTLREG); in xgene_ahci_hw_init()
686 val = readl(ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
689 writel(val, ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
690 val = readl(ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
757 ctx->csr_core = devm_platform_ioremap_resource(pdev, 1); in xgene_ahci_probe()
758 if (IS_ERR(ctx->csr_core)) in xgene_ahci_probe()
759 return PTR_ERR(ctx->csr_core); in xgene_ahci_probe()
812 dev_dbg(dev, "VAddr 0x%p Mmio VAddr 0x%p\n", ctx->csr_core, in xgene_ahci_probe()