392 	prop->cfg_base_address = CFG_BASE;  in goya_set_fixed_properties()
467 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in goya_set_fixed_properties()
521 			(CFG_BASE - SRAM_BASE_ADDR);  in goya_pci_bars_map()
652 	rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0,  in goya_early_init()
940 	region->region_base = CFG_BASE;  in goya_set_pci_memory_regions()
942 	region->offset_in_bar = CFG_BASE - SRAM_BASE_ADDR;  in goya_set_pci_memory_regions()
1096 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
1097 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
1098 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
1099 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
1102 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
1104 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
1145 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
1147 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
1155 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_init_dma_ch()
1158 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_init_dma_ch()
1451 	tpc_eml_address = (mmTPC0_EML_CFG_BASE + tpc_eml_offset - CFG_BASE);  in _goya_tpc_mbist_workaround()
1837 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1838 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1839 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1840 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1843 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1845 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1886 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1887 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1888 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1889 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1892 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1894 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1924 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1925 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1944 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1945 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1946 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1947 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1950 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1952 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1993 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1994 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1995 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1996 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1999 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
2001 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
2034 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2035 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2445 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_enable_timestamp()
2448 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in goya_enable_timestamp()
2449 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in goya_enable_timestamp()
2452 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in goya_enable_timestamp()
2458 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_disable_timestamp()
3636 	sob_start_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_validate_wreg32()
3637 	sob_end_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1023);  in goya_validate_wreg32()
4174 	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF);  in goya_add_end_of_cb_packets()
4854 	sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_context_switch()
4858 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_context_switch()