Lines Matching +full:assigned +full:- +full:clocks +full:- +full:parents
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
29 interrupt-controller;
36 gic_its: msi-controller@1820000 {
37 compatible = "arm,gic-v3-its";
39 socionext,synquacer-pre-its = <0x1000000 0x400000>;
40 msi-controller;
41 #msi-cells = <1>;
46 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
48 #address-cells = <1>;
49 #size-cells = <1>;
53 compatible = "ti,am654-phy-gmii-sel";
55 #phy-cells = <1>;
58 epwm_tbclk: clock-controller@4130 {
59 compatible = "ti,am62-epwm-tbclk";
61 #clock-cells = <1>;
66 compatible = "simple-bus";
67 #address-cells = <2>;
68 #size-cells = <2>;
69 dma-ranges;
72 ti,sci-dev-id = <25>;
75 compatible = "ti,am654-secure-proxy";
79 reg-names = "target_data", "rt", "scfg";
80 #mbox-cells = <1>;
81 interrupt-names = "rx_012";
85 inta_main_dmss: interrupt-controller@48000000 {
86 compatible = "ti,sci-inta";
88 #interrupt-cells = <0>;
89 interrupt-controller;
90 interrupt-parent = <&gic500>;
91 msi-controller;
93 ti,sci-dev-id = <28>;
94 ti,interrupt-ranges = <6 70 34>;
95 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
98 main_bcdma: dma-controller@485c0100 {
99 compatible = "ti,am64-dmss-bcdma";
105 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
106 msi-parent = <&inta_main_dmss>;
107 #dma-cells = <3>;
109 ti,sci-dev-id = <26>;
110 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
111 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
112 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
115 main_pktdma: dma-controller@485c0000 {
116 compatible = "ti,am64-dmss-pktdma";
121 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
122 msi-parent = <&inta_main_dmss>;
123 #dma-cells = <2>;
125 ti,sci-dev-id = <30>;
126 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
130 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
134 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
140 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
147 dmsc: system-controller@44043000 {
148 compatible = "ti,k2g-sci";
150 reg-names = "debug_messages";
151 ti,host-id = <12>;
152 mbox-names = "rx", "tx";
156 k3_pds: power-controller {
157 compatible = "ti,sci-pm-domain";
158 #power-domain-cells = <2>;
161 k3_clks: clock-controller {
162 compatible = "ti,k2g-sci-clk";
163 #clock-cells = <2>;
166 k3_reset: reset-controller {
167 compatible = "ti,sci-reset";
168 #reset-cells = <2>;
173 compatible = "ti,am654-secure-proxy";
174 #mbox-cells = <1>;
175 reg-names = "target_data", "rt", "scfg";
182 * firmware on non-MPU processors
188 compatible = "pinctrl-single";
190 #pinctrl-cells = <1>;
191 pinctrl-single,register-width = <32>;
192 pinctrl-single,function-mask = <0xffffffff>;
196 compatible = "ti,am654-timer";
199 clocks = <&k3_clks 36 2>;
200 clock-names = "fck";
201 assigned-clocks = <&k3_clks 36 2>;
202 assigned-clock-parents = <&k3_clks 36 3>;
203 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
204 ti,timer-pwm;
208 compatible = "ti,am654-timer";
211 clocks = <&k3_clks 37 2>;
212 clock-names = "fck";
213 assigned-clocks = <&k3_clks 37 2>;
214 assigned-clock-parents = <&k3_clks 37 3>;
215 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
216 ti,timer-pwm;
220 compatible = "ti,am654-timer";
223 clocks = <&k3_clks 38 2>;
224 clock-names = "fck";
225 assigned-clocks = <&k3_clks 38 2>;
226 assigned-clock-parents = <&k3_clks 38 3>;
227 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
228 ti,timer-pwm;
232 compatible = "ti,am654-timer";
235 clocks = <&k3_clks 39 2>;
236 clock-names = "fck";
237 assigned-clocks = <&k3_clks 39 2>;
238 assigned-clock-parents = <&k3_clks 39 3>;
239 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
240 ti,timer-pwm;
244 compatible = "ti,am654-timer";
247 clocks = <&k3_clks 40 2>;
248 clock-names = "fck";
249 assigned-clocks = <&k3_clks 40 2>;
250 assigned-clock-parents = <&k3_clks 40 3>;
251 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
252 ti,timer-pwm;
256 compatible = "ti,am654-timer";
259 clocks = <&k3_clks 41 2>;
260 clock-names = "fck";
261 assigned-clocks = <&k3_clks 41 2>;
262 assigned-clock-parents = <&k3_clks 41 3>;
263 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
264 ti,timer-pwm;
268 compatible = "ti,am654-timer";
271 clocks = <&k3_clks 42 2>;
272 clock-names = "fck";
273 assigned-clocks = <&k3_clks 42 2>;
274 assigned-clock-parents = <&k3_clks 42 3>;
275 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
276 ti,timer-pwm;
280 compatible = "ti,am654-timer";
283 clocks = <&k3_clks 43 2>;
284 clock-names = "fck";
285 assigned-clocks = <&k3_clks 43 2>;
286 assigned-clock-parents = <&k3_clks 43 3>;
287 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
288 ti,timer-pwm;
292 compatible = "ti,am64-uart", "ti,am654-uart";
295 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
296 clocks = <&k3_clks 146 0>;
297 clock-names = "fclk";
302 compatible = "ti,am64-uart", "ti,am654-uart";
305 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
306 clocks = <&k3_clks 152 0>;
307 clock-names = "fclk";
312 compatible = "ti,am64-uart", "ti,am654-uart";
315 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
316 clocks = <&k3_clks 153 0>;
317 clock-names = "fclk";
322 compatible = "ti,am64-uart", "ti,am654-uart";
325 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
326 clocks = <&k3_clks 154 0>;
327 clock-names = "fclk";
332 compatible = "ti,am64-uart", "ti,am654-uart";
335 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
336 clocks = <&k3_clks 155 0>;
337 clock-names = "fclk";
342 compatible = "ti,am64-uart", "ti,am654-uart";
345 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
346 clocks = <&k3_clks 156 0>;
347 clock-names = "fclk";
352 compatible = "ti,am64-uart", "ti,am654-uart";
355 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
356 clocks = <&k3_clks 158 0>;
357 clock-names = "fclk";
362 compatible = "ti,am64-i2c", "ti,omap4-i2c";
365 #address-cells = <1>;
366 #size-cells = <0>;
367 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
368 clocks = <&k3_clks 102 2>;
369 clock-names = "fck";
374 compatible = "ti,am64-i2c", "ti,omap4-i2c";
377 #address-cells = <1>;
378 #size-cells = <0>;
379 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
380 clocks = <&k3_clks 103 2>;
381 clock-names = "fck";
386 compatible = "ti,am64-i2c", "ti,omap4-i2c";
389 #address-cells = <1>;
390 #size-cells = <0>;
391 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
392 clocks = <&k3_clks 104 2>;
393 clock-names = "fck";
398 compatible = "ti,am64-i2c", "ti,omap4-i2c";
401 #address-cells = <1>;
402 #size-cells = <0>;
403 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
404 clocks = <&k3_clks 105 2>;
405 clock-names = "fck";
410 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
413 #address-cells = <1>;
414 #size-cells = <0>;
415 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
416 clocks = <&k3_clks 141 0>;
421 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
424 #address-cells = <1>;
425 #size-cells = <0>;
426 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
427 clocks = <&k3_clks 142 0>;
432 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
435 #address-cells = <1>;
436 #size-cells = <0>;
437 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
438 clocks = <&k3_clks 143 0>;
442 main_gpio_intr: interrupt-controller@a00000 {
443 compatible = "ti,sci-intr";
445 ti,intr-trigger-type = <1>;
446 interrupt-controller;
447 interrupt-parent = <&gic500>;
448 #interrupt-cells = <1>;
450 ti,sci-dev-id = <3>;
451 ti,interrupt-ranges = <0 32 16>;
456 compatible = "ti,am64-gpio", "ti,keystone-gpio";
458 gpio-controller;
459 #gpio-cells = <2>;
460 interrupt-parent = <&main_gpio_intr>;
463 interrupt-controller;
464 #interrupt-cells = <2>;
466 ti,davinci-gpio-unbanked = <0>;
467 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
468 clocks = <&k3_clks 77 0>;
469 clock-names = "gpio";
474 compatible = "ti,am64-gpio", "ti,keystone-gpio";
476 gpio-controller;
477 #gpio-cells = <2>;
478 interrupt-parent = <&main_gpio_intr>;
481 interrupt-controller;
482 #interrupt-cells = <2>;
484 ti,davinci-gpio-unbanked = <0>;
485 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
486 clocks = <&k3_clks 78 0>;
487 clock-names = "gpio";
492 compatible = "ti,am62-sdhci";
495 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
496 clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
497 clock-names = "clk_ahb", "clk_xin";
498 ti,trm-icp = <0x2>;
499 ti,otap-del-sel-legacy = <0x0>;
500 ti,otap-del-sel-sd-hs = <0x0>;
501 ti,otap-del-sel-sdr12 = <0xf>;
502 ti,otap-del-sel-sdr25 = <0xf>;
503 ti,otap-del-sel-sdr50 = <0xc>;
504 ti,otap-del-sel-sdr104 = <0x6>;
505 ti,otap-del-sel-ddr50 = <0x9>;
506 ti,itap-del-sel-legacy = <0x0>;
507 ti,itap-del-sel-sd-hs = <0x0>;
508 ti,itap-del-sel-sdr12 = <0x0>;
509 ti,itap-del-sel-sdr25 = <0x0>;
510 ti,clkbuf-sel = <0x7>;
511 bus-width = <4>;
512 no-1-8-v;
516 usbss0: dwc3-usb@f900000 {
517 compatible = "ti,am62-usb";
519 clocks = <&k3_clks 161 3>;
520 clock-names = "ref";
521 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
522 #address-cells = <2>;
523 #size-cells = <2>;
524 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
533 interrupt-names = "host", "peripheral";
534 maximum-speed = "high-speed";
539 usbss1: dwc3-usb@f910000 {
540 compatible = "ti,am62-usb";
542 clocks = <&k3_clks 162 3>;
543 clock-names = "ref";
544 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
545 #address-cells = <2>;
546 #size-cells = <2>;
547 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
556 interrupt-names = "host", "peripheral";
557 maximum-speed = "high-speed";
563 compatible = "simple-bus";
565 #address-cells = <2>;
566 #size-cells = <2>;
571 compatible = "ti,am654-ospi", "cdns,qspi-nor";
575 cdns,fifo-depth = <256>;
576 cdns,fifo-width = <4>;
577 cdns,trigger-address = <0x0>;
578 clocks = <&k3_clks 75 7>;
579 assigned-clocks = <&k3_clks 75 7>;
580 assigned-clock-parents = <&k3_clks 75 8>;
581 assigned-clock-rates = <166666666>;
582 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
583 #address-cells = <1>;
584 #size-cells = <0>;
589 compatible = "ti,am642-cpsw-nuss";
590 #address-cells = <2>;
591 #size-cells = <2>;
593 reg-names = "cpsw_nuss";
595 clocks = <&k3_clks 13 0>;
596 assigned-clocks = <&k3_clks 13 3>;
597 assigned-clock-parents = <&k3_clks 13 11>;
598 clock-names = "fck";
599 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
611 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
614 ethernet-ports {
615 #address-cells = <1>;
616 #size-cells = <0>;
620 ti,mac-only;
623 mac-address = [00 00 00 00 00 00];
624 ti,syscon-efuse = <&wkup_conf 0x200>;
629 ti,mac-only;
632 mac-address = [00 00 00 00 00 00];
637 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
639 #address-cells = <1>;
640 #size-cells = <0>;
641 clocks = <&k3_clks 13 0>;
642 clock-names = "fck";
647 compatible = "ti,j721e-cpts";
649 clocks = <&k3_clks 13 3>;
650 clock-names = "cpts";
651 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
652 interrupt-names = "cpts";
653 ti,cpts-ext-ts-inputs = <4>;
654 ti,cpts-periodic-outputs = <2>;
659 compatible = "ti,am64-hwspinlock";
661 #hwlock-cells = <1>;
665 compatible = "ti,am64-mailbox";
668 #mbox-cells = <1>;
669 ti,mbox-num-users = <4>;
670 ti,mbox-num-fifos = <16>;
674 compatible = "ti,am64-mailbox";
677 #mbox-cells = <1>;
678 ti,mbox-num-users = <4>;
679 ti,mbox-num-fifos = <16>;
683 compatible = "ti,am64-mailbox";
686 #mbox-cells = <1>;
687 ti,mbox-num-users = <4>;
688 ti,mbox-num-fifos = <16>;
692 compatible = "ti,am64-mailbox";
695 #mbox-cells = <1>;
696 ti,mbox-num-users = <4>;
697 ti,mbox-num-fifos = <16>;
704 reg-names = "m_can", "message_ram";
705 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
706 clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
707 clock-names = "hclk", "cclk";
710 interrupt-names = "int0", "int1";
711 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
716 compatible = "ti,j7-rti-wdt";
718 clocks = <&k3_clks 125 0>;
719 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
720 assigned-clocks = <&k3_clks 125 0>;
721 assigned-clock-parents = <&k3_clks 125 2>;
725 compatible = "ti,j7-rti-wdt";
727 clocks = <&k3_clks 126 0>;
728 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
729 assigned-clocks = <&k3_clks 126 0>;
730 assigned-clock-parents = <&k3_clks 126 2>;
734 compatible = "ti,j7-rti-wdt";
736 clocks = <&k3_clks 127 0>;
737 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
738 assigned-clocks = <&k3_clks 127 0>;
739 assigned-clock-parents = <&k3_clks 127 2>;
743 compatible = "ti,j7-rti-wdt";
745 clocks = <&k3_clks 128 0>;
746 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
747 assigned-clocks = <&k3_clks 128 0>;
748 assigned-clock-parents = <&k3_clks 128 2>;
752 compatible = "ti,j7-rti-wdt";
754 clocks = <&k3_clks 205 0>;
755 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
756 assigned-clocks = <&k3_clks 205 0>;
757 assigned-clock-parents = <&k3_clks 205 2>;
761 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
762 #pwm-cells = <3>;
764 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
765 clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
766 clock-names = "tbclk", "fck";
771 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
772 #pwm-cells = <3>;
774 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
775 clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
776 clock-names = "tbclk", "fck";
781 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
782 #pwm-cells = <3>;
784 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
785 clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
786 clock-names = "tbclk", "fck";
791 compatible = "ti,am3352-ecap";
792 #pwm-cells = <3>;
794 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
795 clocks = <&k3_clks 51 0>;
796 clock-names = "fck";
801 compatible = "ti,am3352-ecap";
802 #pwm-cells = <3>;
804 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
805 clocks = <&k3_clks 52 0>;
806 clock-names = "fck";
811 compatible = "ti,am3352-ecap";
812 #pwm-cells = <3>;
814 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
815 clocks = <&k3_clks 53 0>;
816 clock-names = "fck";