Lines Matching +full:am62 +full:- +full:usb
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
28 interrupt-controller;
35 gic_its: msi-controller@1820000 {
36 compatible = "arm,gic-v3-its";
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
39 msi-controller;
40 #msi-cells = <1>;
45 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
47 #address-cells = <1>;
48 #size-cells = <1>;
52 compatible = "ti,am654-phy-gmii-sel";
54 #phy-cells = <1>;
57 epwm_tbclk: clock-controller@4130 {
58 compatible = "ti,am62-epwm-tbclk";
60 #clock-cells = <1>;
65 compatible = "simple-bus";
66 #address-cells = <2>;
67 #size-cells = <2>;
68 dma-ranges;
71 ti,sci-dev-id = <25>;
74 compatible = "ti,am654-secure-proxy";
78 reg-names = "target_data", "rt", "scfg";
79 #mbox-cells = <1>;
80 interrupt-names = "rx_012";
84 inta_main_dmss: interrupt-controller@48000000 {
85 compatible = "ti,sci-inta";
87 #interrupt-cells = <0>;
88 interrupt-controller;
89 interrupt-parent = <&gic500>;
90 msi-controller;
92 ti,sci-dev-id = <28>;
93 ti,interrupt-ranges = <6 70 34>;
94 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
97 main_bcdma: dma-controller@485c0100 {
98 compatible = "ti,am64-dmss-bcdma";
104 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
105 msi-parent = <&inta_main_dmss>;
106 #dma-cells = <3>;
108 ti,sci-dev-id = <26>;
109 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
110 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
111 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
114 main_pktdma: dma-controller@485c0000 {
115 compatible = "ti,am64-dmss-pktdma";
120 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
121 msi-parent = <&inta_main_dmss>;
122 #dma-cells = <2>;
124 ti,sci-dev-id = <30>;
125 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
129 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
133 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
139 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
146 dmsc: system-controller@44043000 {
147 compatible = "ti,k2g-sci";
149 reg-names = "debug_messages";
150 ti,host-id = <12>;
151 mbox-names = "rx", "tx";
155 k3_pds: power-controller {
156 compatible = "ti,sci-pm-domain";
157 #power-domain-cells = <2>;
160 k3_clks: clock-controller {
161 compatible = "ti,k2g-sci-clk";
162 #clock-cells = <2>;
165 k3_reset: reset-controller {
166 compatible = "ti,sci-reset";
167 #reset-cells = <2>;
172 compatible = "ti,am654-secure-proxy";
173 #mbox-cells = <1>;
174 reg-names = "target_data", "rt", "scfg";
181 * firmware on non-MPU processors
187 compatible = "pinctrl-single";
189 #pinctrl-cells = <1>;
190 pinctrl-single,register-width = <32>;
191 pinctrl-single,function-mask = <0xffffffff>;
195 compatible = "ti,am654-timer";
199 clock-names = "fck";
200 assigned-clocks = <&k3_clks 36 2>;
201 assigned-clock-parents = <&k3_clks 36 3>;
202 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
203 ti,timer-pwm;
207 compatible = "ti,am654-timer";
211 clock-names = "fck";
212 assigned-clocks = <&k3_clks 37 2>;
213 assigned-clock-parents = <&k3_clks 37 3>;
214 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
215 ti,timer-pwm;
219 compatible = "ti,am654-timer";
223 clock-names = "fck";
224 assigned-clocks = <&k3_clks 38 2>;
225 assigned-clock-parents = <&k3_clks 38 3>;
226 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
227 ti,timer-pwm;
231 compatible = "ti,am654-timer";
235 clock-names = "fck";
236 assigned-clocks = <&k3_clks 39 2>;
237 assigned-clock-parents = <&k3_clks 39 3>;
238 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
239 ti,timer-pwm;
243 compatible = "ti,am654-timer";
247 clock-names = "fck";
248 assigned-clocks = <&k3_clks 40 2>;
249 assigned-clock-parents = <&k3_clks 40 3>;
250 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
251 ti,timer-pwm;
255 compatible = "ti,am654-timer";
259 clock-names = "fck";
260 assigned-clocks = <&k3_clks 41 2>;
261 assigned-clock-parents = <&k3_clks 41 3>;
262 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
263 ti,timer-pwm;
267 compatible = "ti,am654-timer";
271 clock-names = "fck";
272 assigned-clocks = <&k3_clks 42 2>;
273 assigned-clock-parents = <&k3_clks 42 3>;
274 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
275 ti,timer-pwm;
279 compatible = "ti,am654-timer";
283 clock-names = "fck";
284 assigned-clocks = <&k3_clks 43 2>;
285 assigned-clock-parents = <&k3_clks 43 3>;
286 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
287 ti,timer-pwm;
291 compatible = "ti,am64-uart", "ti,am654-uart";
294 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
296 clock-names = "fclk";
301 compatible = "ti,am64-uart", "ti,am654-uart";
304 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
306 clock-names = "fclk";
311 compatible = "ti,am64-uart", "ti,am654-uart";
314 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
316 clock-names = "fclk";
321 compatible = "ti,am64-uart", "ti,am654-uart";
324 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
326 clock-names = "fclk";
331 compatible = "ti,am64-uart", "ti,am654-uart";
334 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
336 clock-names = "fclk";
341 compatible = "ti,am64-uart", "ti,am654-uart";
344 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
346 clock-names = "fclk";
351 compatible = "ti,am64-uart", "ti,am654-uart";
354 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
356 clock-names = "fclk";
361 compatible = "ti,am64-i2c", "ti,omap4-i2c";
364 #address-cells = <1>;
365 #size-cells = <0>;
366 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
368 clock-names = "fck";
373 compatible = "ti,am64-i2c", "ti,omap4-i2c";
376 #address-cells = <1>;
377 #size-cells = <0>;
378 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
380 clock-names = "fck";
385 compatible = "ti,am64-i2c", "ti,omap4-i2c";
388 #address-cells = <1>;
389 #size-cells = <0>;
390 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
392 clock-names = "fck";
397 compatible = "ti,am64-i2c", "ti,omap4-i2c";
400 #address-cells = <1>;
401 #size-cells = <0>;
402 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
404 clock-names = "fck";
409 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
412 #address-cells = <1>;
413 #size-cells = <0>;
414 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
420 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
423 #address-cells = <1>;
424 #size-cells = <0>;
425 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
431 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
434 #address-cells = <1>;
435 #size-cells = <0>;
436 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
441 main_gpio_intr: interrupt-controller@a00000 {
442 compatible = "ti,sci-intr";
444 ti,intr-trigger-type = <1>;
445 interrupt-controller;
446 interrupt-parent = <&gic500>;
447 #interrupt-cells = <1>;
449 ti,sci-dev-id = <3>;
450 ti,interrupt-ranges = <0 32 16>;
455 compatible = "ti,am64-gpio", "ti,keystone-gpio";
457 gpio-controller;
458 #gpio-cells = <2>;
459 interrupt-parent = <&main_gpio_intr>;
462 interrupt-controller;
463 #interrupt-cells = <2>;
465 ti,davinci-gpio-unbanked = <0>;
466 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
468 clock-names = "gpio";
473 compatible = "ti,am64-gpio", "ti,keystone-gpio";
475 gpio-controller;
476 #gpio-cells = <2>;
477 interrupt-parent = <&main_gpio_intr>;
480 interrupt-controller;
481 #interrupt-cells = <2>;
483 ti,davinci-gpio-unbanked = <0>;
484 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
486 clock-names = "gpio";
491 compatible = "ti,am62-sdhci";
494 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
496 clock-names = "clk_ahb", "clk_xin";
497 ti,trm-icp = <0x2>;
498 ti,otap-del-sel-legacy = <0x0>;
499 ti,otap-del-sel-sd-hs = <0x0>;
500 ti,otap-del-sel-sdr12 = <0xf>;
501 ti,otap-del-sel-sdr25 = <0xf>;
502 ti,otap-del-sel-sdr50 = <0xc>;
503 ti,otap-del-sel-sdr104 = <0x6>;
504 ti,otap-del-sel-ddr50 = <0x9>;
505 ti,itap-del-sel-legacy = <0x0>;
506 ti,itap-del-sel-sd-hs = <0x0>;
507 ti,itap-del-sel-sdr12 = <0x0>;
508 ti,itap-del-sel-sdr25 = <0x0>;
509 ti,clkbuf-sel = <0x7>;
510 bus-width = <4>;
511 no-1-8-v;
515 usbss0: dwc3-usb@f900000 {
516 compatible = "ti,am62-usb";
519 clock-names = "ref";
520 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
521 #address-cells = <2>;
522 #size-cells = <2>;
523 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
527 usb0: usb@31000000 {
532 interrupt-names = "host", "peripheral";
533 maximum-speed = "high-speed";
538 usbss1: dwc3-usb@f910000 {
539 compatible = "ti,am62-usb";
542 clock-names = "ref";
543 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
544 #address-cells = <2>;
545 #size-cells = <2>;
546 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
550 usb1: usb@31100000 {
555 interrupt-names = "host", "peripheral";
556 maximum-speed = "high-speed";
562 compatible = "simple-bus";
564 #address-cells = <2>;
565 #size-cells = <2>;
570 compatible = "ti,am654-ospi", "cdns,qspi-nor";
574 cdns,fifo-depth = <256>;
575 cdns,fifo-width = <4>;
576 cdns,trigger-address = <0x0>;
578 assigned-clocks = <&k3_clks 75 7>;
579 assigned-clock-parents = <&k3_clks 75 8>;
580 assigned-clock-rates = <166666666>;
581 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
582 #address-cells = <1>;
583 #size-cells = <0>;
588 compatible = "ti,am642-cpsw-nuss";
589 #address-cells = <2>;
590 #size-cells = <2>;
592 reg-names = "cpsw_nuss";
595 assigned-clocks = <&k3_clks 13 3>;
596 assigned-clock-parents = <&k3_clks 13 11>;
597 clock-names = "fck";
598 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
610 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
613 ethernet-ports {
614 #address-cells = <1>;
615 #size-cells = <0>;
619 ti,mac-only;
622 mac-address = [00 00 00 00 00 00];
623 ti,syscon-efuse = <&wkup_conf 0x200>;
628 ti,mac-only;
631 mac-address = [00 00 00 00 00 00];
636 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
638 #address-cells = <1>;
639 #size-cells = <0>;
641 clock-names = "fck";
646 compatible = "ti,j721e-cpts";
649 clock-names = "cpts";
650 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
651 interrupt-names = "cpts";
652 ti,cpts-ext-ts-inputs = <4>;
653 ti,cpts-periodic-outputs = <2>;
658 compatible = "ti,am64-hwspinlock";
660 #hwlock-cells = <1>;
664 compatible = "ti,am64-mailbox";
667 #mbox-cells = <1>;
668 ti,mbox-num-users = <4>;
669 ti,mbox-num-fifos = <16>;
673 compatible = "ti,am64-mailbox";
676 #mbox-cells = <1>;
677 ti,mbox-num-users = <4>;
678 ti,mbox-num-fifos = <16>;
682 compatible = "ti,am64-mailbox";
685 #mbox-cells = <1>;
686 ti,mbox-num-users = <4>;
687 ti,mbox-num-fifos = <16>;
691 compatible = "ti,am64-mailbox";
694 #mbox-cells = <1>;
695 ti,mbox-num-users = <4>;
696 ti,mbox-num-fifos = <16>;
703 reg-names = "m_can", "message_ram";
704 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
706 clock-names = "hclk", "cclk";
709 interrupt-names = "int0", "int1";
710 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
715 compatible = "ti,j7-rti-wdt";
718 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
719 assigned-clocks = <&k3_clks 125 0>;
720 assigned-clock-parents = <&k3_clks 125 2>;
724 compatible = "ti,j7-rti-wdt";
727 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
728 assigned-clocks = <&k3_clks 126 0>;
729 assigned-clock-parents = <&k3_clks 126 2>;
733 compatible = "ti,j7-rti-wdt";
736 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
737 assigned-clocks = <&k3_clks 127 0>;
738 assigned-clock-parents = <&k3_clks 127 2>;
742 compatible = "ti,j7-rti-wdt";
745 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
746 assigned-clocks = <&k3_clks 128 0>;
747 assigned-clock-parents = <&k3_clks 128 2>;
751 compatible = "ti,j7-rti-wdt";
754 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
755 assigned-clocks = <&k3_clks 205 0>;
756 assigned-clock-parents = <&k3_clks 205 2>;
760 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
761 #pwm-cells = <3>;
763 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
765 clock-names = "tbclk", "fck";
770 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
771 #pwm-cells = <3>;
773 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
775 clock-names = "tbclk", "fck";
780 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
781 #pwm-cells = <3>;
783 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
785 clock-names = "tbclk", "fck";
790 compatible = "ti,am3352-ecap";
791 #pwm-cells = <3>;
793 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
795 clock-names = "fck";
800 compatible = "ti,am3352-ecap";
801 #pwm-cells = <3>;
803 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
805 clock-names = "fck";
810 compatible = "ti,am3352-ecap";
811 #pwm-cells = <3>;
813 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
815 clock-names = "fck";