Lines Matching +full:cpu +full:- +full:power +full:- +full:controller
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC
8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779f0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 cluster01_opp: opp-table-0 {
18 compatible = "operating-points-v2";
19 opp-shared;
21 opp-500000000 {
22 opp-hz = /bits/ 64 <500000000>;
23 opp-microvolt = <880000>;
24 clock-latency-ns = <500000>;
26 opp-800000000 {
27 opp-hz = /bits/ 64 <800000000>;
28 opp-microvolt = <880000>;
29 clock-latency-ns = <500000>;
31 opp-1000000000 {
32 opp-hz = /bits/ 64 <1000000000>;
33 opp-microvolt = <880000>;
34 clock-latency-ns = <500000>;
36 opp-1200000000 {
37 opp-hz = /bits/ 64 <1200000000>;
38 opp-microvolt = <880000>;
39 clock-latency-ns = <500000>;
40 opp-suspend;
44 cluster23_opp: opp-table-1 {
45 compatible = "operating-points-v2";
46 opp-shared;
48 opp-500000000 {
49 opp-hz = /bits/ 64 <500000000>;
50 opp-microvolt = <880000>;
51 clock-latency-ns = <500000>;
53 opp-800000000 {
54 opp-hz = /bits/ 64 <800000000>;
55 opp-microvolt = <880000>;
56 clock-latency-ns = <500000>;
58 opp-1000000000 {
59 opp-hz = /bits/ 64 <1000000000>;
60 opp-microvolt = <880000>;
61 clock-latency-ns = <500000>;
63 opp-1200000000 {
64 opp-hz = /bits/ 64 <1200000000>;
65 opp-microvolt = <880000>;
66 clock-latency-ns = <500000>;
67 opp-suspend;
72 #address-cells = <1>;
73 #size-cells = <0>;
75 cpu-map {
78 cpu = <&a55_0>;
81 cpu = <&a55_1>;
87 cpu = <&a55_2>;
90 cpu = <&a55_3>;
96 cpu = <&a55_4>;
99 cpu = <&a55_5>;
105 cpu = <&a55_6>;
108 cpu = <&a55_7>;
113 a55_0: cpu@0 {
114 compatible = "arm,cortex-a55";
116 device_type = "cpu";
117 power-domains = <&sysc R8A779F0_PD_A1E0D0C0>;
118 next-level-cache = <&L3_CA55_0>;
119 enable-method = "psci";
120 cpu-idle-states = <&CPU_SLEEP_0>;
122 operating-points-v2 = <&cluster01_opp>;
125 a55_1: cpu@100 {
126 compatible = "arm,cortex-a55";
128 device_type = "cpu";
129 power-domains = <&sysc R8A779F0_PD_A1E0D0C1>;
130 next-level-cache = <&L3_CA55_0>;
131 enable-method = "psci";
132 cpu-idle-states = <&CPU_SLEEP_0>;
134 operating-points-v2 = <&cluster01_opp>;
137 a55_2: cpu@10000 {
138 compatible = "arm,cortex-a55";
140 device_type = "cpu";
141 power-domains = <&sysc R8A779F0_PD_A1E0D1C0>;
142 next-level-cache = <&L3_CA55_1>;
143 enable-method = "psci";
144 cpu-idle-states = <&CPU_SLEEP_0>;
146 operating-points-v2 = <&cluster01_opp>;
149 a55_3: cpu@10100 {
150 compatible = "arm,cortex-a55";
152 device_type = "cpu";
153 power-domains = <&sysc R8A779F0_PD_A1E0D1C1>;
154 next-level-cache = <&L3_CA55_1>;
155 enable-method = "psci";
156 cpu-idle-states = <&CPU_SLEEP_0>;
158 operating-points-v2 = <&cluster01_opp>;
161 a55_4: cpu@20000 {
162 compatible = "arm,cortex-a55";
164 device_type = "cpu";
165 power-domains = <&sysc R8A779F0_PD_A1E1D0C0>;
166 next-level-cache = <&L3_CA55_2>;
167 enable-method = "psci";
168 cpu-idle-states = <&CPU_SLEEP_0>;
170 operating-points-v2 = <&cluster23_opp>;
173 a55_5: cpu@20100 {
174 compatible = "arm,cortex-a55";
176 device_type = "cpu";
177 power-domains = <&sysc R8A779F0_PD_A1E1D0C1>;
178 next-level-cache = <&L3_CA55_2>;
179 enable-method = "psci";
180 cpu-idle-states = <&CPU_SLEEP_0>;
182 operating-points-v2 = <&cluster23_opp>;
185 a55_6: cpu@30000 {
186 compatible = "arm,cortex-a55";
188 device_type = "cpu";
189 power-domains = <&sysc R8A779F0_PD_A1E1D1C0>;
190 next-level-cache = <&L3_CA55_3>;
191 enable-method = "psci";
192 cpu-idle-states = <&CPU_SLEEP_0>;
194 operating-points-v2 = <&cluster23_opp>;
197 a55_7: cpu@30100 {
198 compatible = "arm,cortex-a55";
200 device_type = "cpu";
201 power-domains = <&sysc R8A779F0_PD_A1E1D1C1>;
202 next-level-cache = <&L3_CA55_3>;
203 enable-method = "psci";
204 cpu-idle-states = <&CPU_SLEEP_0>;
206 operating-points-v2 = <&cluster23_opp>;
209 L3_CA55_0: cache-controller-0 {
211 power-domains = <&sysc R8A779F0_PD_A2E0D0>;
212 cache-unified;
213 cache-level = <3>;
216 L3_CA55_1: cache-controller-1 {
218 power-domains = <&sysc R8A779F0_PD_A2E0D1>;
219 cache-unified;
220 cache-level = <3>;
223 L3_CA55_2: cache-controller-2 {
225 power-domains = <&sysc R8A779F0_PD_A2E1D0>;
226 cache-unified;
227 cache-level = <3>;
230 L3_CA55_3: cache-controller-3 {
232 power-domains = <&sysc R8A779F0_PD_A2E1D1>;
233 cache-unified;
234 cache-level = <3>;
237 idle-states {
238 entry-method = "psci";
240 CPU_SLEEP_0: cpu-sleep-0 {
241 compatible = "arm,idle-state";
242 arm,psci-suspend-param = <0x0010000>;
243 local-timer-stop;
244 entry-latency-us = <400>;
245 exit-latency-us = <500>;
246 min-residency-us = <4000>;
252 compatible = "fixed-clock";
253 #clock-cells = <0>;
255 clock-frequency = <0>;
259 compatible = "fixed-clock";
260 #clock-cells = <0>;
262 clock-frequency = <0>;
266 compatible = "arm,cortex-a55-pmu";
267 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
271 compatible = "arm,psci-1.0", "arm,psci-0.2";
275 /* External SCIF clock - to be overridden by boards that provide it */
277 compatible = "fixed-clock";
278 #clock-cells = <0>;
279 clock-frequency = <0>;
283 compatible = "simple-bus";
284 interrupt-parent = <&gic>;
285 #address-cells = <2>;
286 #size-cells = <2>;
290 compatible = "renesas,r8a779f0-wdt",
291 "renesas,rcar-gen4-wdt";
295 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
301 compatible = "renesas,pfc-r8a779f0";
307 compatible = "renesas,gpio-r8a779f0",
308 "renesas,rcar-gen4-gpio";
312 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
314 gpio-controller;
315 #gpio-cells = <2>;
316 gpio-ranges = <&pfc 0 0 21>;
317 interrupt-controller;
318 #interrupt-cells = <2>;
322 compatible = "renesas,gpio-r8a779f0",
323 "renesas,rcar-gen4-gpio";
327 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
329 gpio-controller;
330 #gpio-cells = <2>;
331 gpio-ranges = <&pfc 0 32 25>;
332 interrupt-controller;
333 #interrupt-cells = <2>;
337 compatible = "renesas,gpio-r8a779f0",
338 "renesas,rcar-gen4-gpio";
342 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
344 gpio-controller;
345 #gpio-cells = <2>;
346 gpio-ranges = <&pfc 0 64 17>;
347 interrupt-controller;
348 #interrupt-cells = <2>;
352 compatible = "renesas,gpio-r8a779f0",
353 "renesas,rcar-gen4-gpio";
357 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
359 gpio-controller;
360 #gpio-cells = <2>;
361 gpio-ranges = <&pfc 0 96 19>;
362 interrupt-controller;
363 #interrupt-cells = <2>;
367 compatible = "renesas,r8a779f0-cmt0",
368 "renesas,rcar-gen4-cmt0";
373 clock-names = "fck";
374 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
380 compatible = "renesas,r8a779f0-cmt1",
381 "renesas,rcar-gen4-cmt1";
392 clock-names = "fck";
393 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
399 compatible = "renesas,r8a779f0-cmt1",
400 "renesas,rcar-gen4-cmt1";
411 clock-names = "fck";
412 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
418 compatible = "renesas,r8a779f0-cmt1",
419 "renesas,rcar-gen4-cmt1";
430 clock-names = "fck";
431 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
436 cpg: clock-controller@e6150000 {
437 compatible = "renesas,r8a779f0-cpg-mssr";
440 clock-names = "extal", "extalr";
441 #clock-cells = <2>;
442 #power-domain-cells = <0>;
443 #reset-cells = <1>;
446 rst: reset-controller@e6160000 {
447 compatible = "renesas,r8a779f0-rst";
451 sysc: system-controller@e6180000 {
452 compatible = "renesas,r8a779f0-sysc";
454 #power-domain-cells = <1>;
458 compatible = "renesas,r8a779f0-thermal";
464 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
466 #thermal-sensor-cells = <1>;
469 intc_ex: interrupt-controller@e61c0000 {
470 compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc";
471 #interrupt-cells = <2>;
472 interrupt-controller;
481 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
485 compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
491 clock-names = "fck";
492 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
498 compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
504 clock-names = "fck";
505 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
511 compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
517 clock-names = "fck";
518 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
524 compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
530 clock-names = "fck";
531 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
537 compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
543 clock-names = "fck";
544 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
550 compatible = "renesas,r8a779f0-ether-serdes";
553 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
555 #phy-cells = <1>;
560 compatible = "renesas,i2c-r8a779f0",
561 "renesas,rcar-gen4-i2c";
565 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
569 dma-names = "tx", "rx", "tx", "rx";
570 i2c-scl-internal-delay-ns = <110>;
571 #address-cells = <1>;
572 #size-cells = <0>;
577 compatible = "renesas,i2c-r8a779f0",
578 "renesas,rcar-gen4-i2c";
582 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
586 dma-names = "tx", "rx", "tx", "rx";
587 i2c-scl-internal-delay-ns = <110>;
588 #address-cells = <1>;
589 #size-cells = <0>;
594 compatible = "renesas,i2c-r8a779f0",
595 "renesas,rcar-gen4-i2c";
599 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
603 dma-names = "tx", "rx", "tx", "rx";
604 i2c-scl-internal-delay-ns = <110>;
605 #address-cells = <1>;
606 #size-cells = <0>;
611 compatible = "renesas,i2c-r8a779f0",
612 "renesas,rcar-gen4-i2c";
616 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
620 dma-names = "tx", "rx", "tx", "rx";
621 i2c-scl-internal-delay-ns = <110>;
622 #address-cells = <1>;
623 #size-cells = <0>;
628 compatible = "renesas,i2c-r8a779f0",
629 "renesas,rcar-gen4-i2c";
633 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
637 dma-names = "tx", "rx", "tx", "rx";
638 i2c-scl-internal-delay-ns = <110>;
639 #address-cells = <1>;
640 #size-cells = <0>;
645 compatible = "renesas,i2c-r8a779f0",
646 "renesas,rcar-gen4-i2c";
650 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
654 dma-names = "tx", "rx", "tx", "rx";
655 i2c-scl-internal-delay-ns = <110>;
656 #address-cells = <1>;
657 #size-cells = <0>;
662 compatible = "renesas,hscif-r8a779f0",
663 "renesas,rcar-gen4-hscif", "renesas,hscif";
669 clock-names = "fck", "brg_int", "scif_clk";
672 dma-names = "tx", "rx", "tx", "rx";
673 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
679 compatible = "renesas,hscif-r8a779f0",
680 "renesas,rcar-gen4-hscif", "renesas,hscif";
686 clock-names = "fck", "brg_int", "scif_clk";
689 dma-names = "tx", "rx", "tx", "rx";
690 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
696 compatible = "renesas,hscif-r8a779f0",
697 "renesas,rcar-gen4-hscif", "renesas,hscif";
703 clock-names = "fck", "brg_int", "scif_clk";
706 dma-names = "tx", "rx", "tx", "rx";
707 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
713 compatible = "renesas,hscif-r8a779f0",
714 "renesas,rcar-gen4-hscif", "renesas,hscif";
720 clock-names = "fck", "brg_int", "scif_clk";
723 dma-names = "tx", "rx", "tx", "rx";
724 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
730 compatible = "renesas,r8a779f0-ufs";
734 clock-names = "fck", "ref_clk";
735 freq-table-hz = <200000000 200000000>, <38400000 38400000>;
736 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
742 compatible = "renesas,r8a779f0-ether-switch";
744 reg-names = "base", "secure_base";
792 interrupt-names = "mfwd_error", "race_error",
818 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
822 ethernet-ports {
823 #address-cells = <1>;
824 #size-cells = <0>;
842 compatible = "renesas,scif-r8a779f0",
843 "renesas,rcar-gen4-scif", "renesas,scif";
849 clock-names = "fck", "brg_int", "scif_clk";
852 dma-names = "tx", "rx", "tx", "rx";
853 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
859 compatible = "renesas,scif-r8a779f0",
860 "renesas,rcar-gen4-scif", "renesas,scif";
866 clock-names = "fck", "brg_int", "scif_clk";
869 dma-names = "tx", "rx", "tx", "rx";
870 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
876 compatible = "renesas,scif-r8a779f0",
877 "renesas,rcar-gen4-scif", "renesas,scif";
883 clock-names = "fck", "brg_int", "scif_clk";
886 dma-names = "tx", "rx", "tx", "rx";
887 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
893 compatible = "renesas,scif-r8a779f0",
894 "renesas,rcar-gen4-scif", "renesas,scif";
900 clock-names = "fck", "brg_int", "scif_clk";
903 dma-names = "tx", "rx", "tx", "rx";
904 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
910 compatible = "renesas,msiof-r8a779f0",
911 "renesas,rcar-gen4-msiof";
917 dma-names = "tx", "rx", "tx", "rx";
918 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
920 #address-cells = <1>;
921 #size-cells = <0>;
926 compatible = "renesas,msiof-r8a779f0",
927 "renesas,rcar-gen4-msiof";
933 dma-names = "tx", "rx", "tx", "rx";
934 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
936 #address-cells = <1>;
937 #size-cells = <0>;
942 compatible = "renesas,msiof-r8a779f0",
943 "renesas,rcar-gen4-msiof";
949 dma-names = "tx", "rx", "tx", "rx";
950 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
952 #address-cells = <1>;
953 #size-cells = <0>;
958 compatible = "renesas,msiof-r8a779f0",
959 "renesas,rcar-gen4-msiof";
965 dma-names = "tx", "rx", "tx", "rx";
966 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
968 #address-cells = <1>;
969 #size-cells = <0>;
973 dmac0: dma-controller@e7350000 {
974 compatible = "renesas,dmac-r8a779f0",
975 "renesas,rcar-gen4-dmac";
995 interrupt-names = "error",
1001 clock-names = "fck";
1002 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1004 #dma-cells = <1>;
1005 dma-channels = <16>;
1016 dmac1: dma-controller@e7351000 {
1017 compatible = "renesas,dmac-r8a779f0",
1018 "renesas,rcar-gen4-dmac";
1038 interrupt-names = "error",
1044 clock-names = "fck";
1045 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1047 #dma-cells = <1>;
1048 dma-channels = <16>;
1060 compatible = "renesas,sdhi-r8a779f0",
1061 "renesas,rcar-gen4-sdhi";
1065 clock-names = "core", "clkh";
1066 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1068 max-frequency = <200000000>;
1074 compatible = "renesas,ipmmu-r8a779f0",
1075 "renesas,rcar-gen4-ipmmu-vmsa";
1077 renesas,ipmmu-main = <&ipmmu_mm>;
1078 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1079 #iommu-cells = <1>;
1083 compatible = "renesas,ipmmu-r8a779f0",
1084 "renesas,rcar-gen4-ipmmu-vmsa";
1086 renesas,ipmmu-main = <&ipmmu_mm>;
1087 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1088 #iommu-cells = <1>;
1092 compatible = "renesas,ipmmu-r8a779f0",
1093 "renesas,rcar-gen4-ipmmu-vmsa";
1095 renesas,ipmmu-main = <&ipmmu_mm>;
1096 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1097 #iommu-cells = <1>;
1101 compatible = "renesas,ipmmu-r8a779f0",
1102 "renesas,rcar-gen4-ipmmu-vmsa";
1104 renesas,ipmmu-main = <&ipmmu_mm>;
1105 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1106 #iommu-cells = <1>;
1110 compatible = "renesas,ipmmu-r8a779f0",
1111 "renesas,rcar-gen4-ipmmu-vmsa";
1115 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
1116 #iommu-cells = <1>;
1119 gic: interrupt-controller@f1000000 {
1120 compatible = "arm,gic-v3";
1121 #interrupt-cells = <3>;
1122 #address-cells = <0>;
1123 interrupt-controller;
1135 thermal-zones {
1136 sensor_thermal_rtcore: sensor1-thermal {
1137 polling-delay-passive = <250>;
1138 polling-delay = <1000>;
1139 thermal-sensors = <&tsc 0>;
1142 sensor1_crit: sensor1-crit {
1150 sensor_thermal_apcore0: sensor2-thermal {
1151 polling-delay-passive = <250>;
1152 polling-delay = <1000>;
1153 thermal-sensors = <&tsc 1>;
1156 sensor2_crit: sensor2-crit {
1164 sensor_thermal_apcore4: sensor3-thermal {
1165 polling-delay-passive = <250>;
1166 polling-delay = <1000>;
1167 thermal-sensors = <&tsc 2>;
1170 sensor3_crit: sensor3-crit {
1180 compatible = "arm,armv8-timer";
1181 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
1186 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
1187 "hyp-virt";
1190 ufs30_clk: ufs30-clk {
1191 compatible = "fixed-clock";
1192 #clock-cells = <0>;
1194 clock-frequency = <0>;