Lines Matching +full:0 +full:xe6198000
17 cluster01_opp: opp-table-0 {
73 #size-cells = <0>;
113 a55_0: cpu@0 {
115 reg = <0>;
127 reg = <0x100>;
139 reg = <0x10000>;
151 reg = <0x10100>;
163 reg = <0x20000>;
175 reg = <0x20100>;
187 reg = <0x30000>;
199 reg = <0x30100>;
209 L3_CA55_0: cache-controller-0 {
240 CPU_SLEEP_0: cpu-sleep-0 {
242 arm,psci-suspend-param = <0x0010000>;
253 #clock-cells = <0>;
255 clock-frequency = <0>;
260 #clock-cells = <0>;
262 clock-frequency = <0>;
278 #clock-cells = <0>;
279 clock-frequency = <0>;
292 reg = <0 0xe6020000 0 0x0c>;
302 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
303 <0 0xe6051000 0 0x16c>, <0 0xe6051800 0 0x16c>;
309 reg = <0 0xe6050180 0 0x54>;
316 gpio-ranges = <&pfc 0 0 21>;
324 reg = <0 0xe6050980 0 0x54>;
331 gpio-ranges = <&pfc 0 32 25>;
339 reg = <0 0xe6051180 0 0x54>;
346 gpio-ranges = <&pfc 0 64 17>;
354 reg = <0 0xe6051980 0 0x54>;
361 gpio-ranges = <&pfc 0 96 19>;
369 reg = <0 0xe60f0000 0 0x1004>;
382 reg = <0 0xe6130000 0 0x1004>;
401 reg = <0 0xe6140000 0 0x1004>;
420 reg = <0 0xe6148000 0 0x1004>;
438 reg = <0 0xe6150000 0 0x4000>;
442 #power-domain-cells = <0>;
448 reg = <0 0xe6160000 0 0x4000>;
453 reg = <0 0xe6180000 0 0x4000>;
460 reg = <0 0xe6198000 0 0x200>,
461 <0 0xe61a0000 0 0x200>,
462 <0 0xe61a8000 0 0x200>;
473 reg = <0 0xe61c0000 0 0x200>;
474 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
486 reg = <0 0xe61e0000 0 0x30>;
499 reg = <0 0xe6fc0000 0 0x30>;
512 reg = <0 0xe6fd0000 0 0x30>;
525 reg = <0 0xe6fe0000 0 0x30>;
538 reg = <0 0xffc00000 0 0x30>;
551 reg = <0 0xe6444000 0 0x2800>;
562 reg = <0 0xe6500000 0 0x40>;
567 dmas = <&dmac0 0x91>, <&dmac0 0x90>,
568 <&dmac1 0x91>, <&dmac1 0x90>;
572 #size-cells = <0>;
579 reg = <0 0xe6508000 0 0x40>;
584 dmas = <&dmac0 0x93>, <&dmac0 0x92>,
585 <&dmac1 0x93>, <&dmac1 0x92>;
589 #size-cells = <0>;
596 reg = <0 0xe6510000 0 0x40>;
597 interrupts = <0 240 IRQ_TYPE_LEVEL_HIGH>;
601 dmas = <&dmac0 0x95>, <&dmac0 0x94>,
602 <&dmac1 0x95>, <&dmac1 0x94>;
606 #size-cells = <0>;
613 reg = <0 0xe66d0000 0 0x40>;
618 dmas = <&dmac0 0x97>, <&dmac0 0x96>,
619 <&dmac1 0x97>, <&dmac1 0x96>;
623 #size-cells = <0>;
630 reg = <0 0xe66d8000 0 0x40>;
635 dmas = <&dmac0 0x99>, <&dmac0 0x98>,
636 <&dmac1 0x99>, <&dmac1 0x98>;
640 #size-cells = <0>;
647 reg = <0 0xe66e0000 0 0x40>;
652 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>,
653 <&dmac1 0x9b>, <&dmac1 0x9a>;
657 #size-cells = <0>;
664 reg = <0 0xe6540000 0 0x60>;
670 dmas = <&dmac0 0x31>, <&dmac0 0x30>,
671 <&dmac1 0x31>, <&dmac1 0x30>;
681 reg = <0 0xe6550000 0 0x60>;
687 dmas = <&dmac0 0x33>, <&dmac0 0x32>,
688 <&dmac1 0x33>, <&dmac1 0x32>;
698 reg = <0 0xe6560000 0 0x60>;
704 dmas = <&dmac0 0x35>, <&dmac0 0x34>,
705 <&dmac1 0x35>, <&dmac1 0x34>;
715 reg = <0 0xe66a0000 0 0x60>;
721 dmas = <&dmac0 0x37>, <&dmac0 0x36>,
722 <&dmac1 0x37>, <&dmac1 0x36>;
731 reg = <0 0xe6860000 0 0x100>;
743 reg = <0 0xe6880000 0 0x20000>, <0 0xe68c0000 0 0x20000>;
824 #size-cells = <0>;
826 port@0 {
827 reg = <0>;
828 phys = <ð_serdes 0>;
844 reg = <0 0xe6e60000 0 64>;
850 dmas = <&dmac0 0x51>, <&dmac0 0x50>,
851 <&dmac1 0x51>, <&dmac1 0x50>;
861 reg = <0 0xe6e68000 0 64>;
867 dmas = <&dmac0 0x53>, <&dmac0 0x52>,
868 <&dmac1 0x53>, <&dmac1 0x52>;
878 reg = <0 0xe6c50000 0 64>;
884 dmas = <&dmac0 0x57>, <&dmac0 0x56>,
885 <&dmac1 0x57>, <&dmac1 0x56>;
895 reg = <0 0xe6c40000 0 64>;
901 dmas = <&dmac0 0x59>, <&dmac0 0x58>,
902 <&dmac1 0x59>, <&dmac1 0x58>;
912 reg = <0 0xe6e90000 0 0x0064>;
915 dmas = <&dmac0 0x41>, <&dmac0 0x40>,
916 <&dmac1 0x41>, <&dmac1 0x40>;
921 #size-cells = <0>;
928 reg = <0 0xe6ea0000 0 0x0064>;
931 dmas = <&dmac0 0x43>, <&dmac0 0x42>,
932 <&dmac1 0x43>, <&dmac1 0x42>;
937 #size-cells = <0>;
944 reg = <0 0xe6c00000 0 0x0064>;
947 dmas = <&dmac0 0x45>, <&dmac0 0x44>,
948 <&dmac1 0x45>, <&dmac1 0x44>;
953 #size-cells = <0>;
960 reg = <0 0xe6c10000 0 0x0064>;
963 dmas = <&dmac0 0x47>, <&dmac0 0x46>,
964 <&dmac1 0x47>, <&dmac1 0x46>;
969 #size-cells = <0>;
976 reg = <0 0xe7350000 0 0x1000>,
977 <0 0xe7300000 0 0x10000>;
1006 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1019 reg = <0 0xe7351000 0 0x1000>,
1020 <0 0xe7310000 0 0x10000>;
1062 reg = <0 0xee140000 0 0x2000>;
1076 reg = <0 0xee480000 0 0x20000>;
1085 reg = <0 0xee4c0000 0 0x20000>;
1094 reg = <0 0xeed00000 0 0x20000>;
1103 reg = <0 0xeed40000 0 0x20000>;
1112 reg = <0 0xeefc0000 0 0x20000>;
1122 #address-cells = <0>;
1124 reg = <0x0 0xf1000000 0 0x20000>,
1125 <0x0 0xf1060000 0 0x110000>;
1131 reg = <0 0xfff00044 0 4>;
1139 thermal-sensors = <&tsc 0>;
1192 #clock-cells = <0>;
1194 clock-frequency = <0>;