Lines Matching +full:- +full:pinmux
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
39 num-interpolated-steps = <1023>;
40 default-brightness-level = <576>;
43 dmic_codec: dmic-codec {
44 compatible = "dmic-codec";
45 num-channels = <2>;
46 wakeup-delay-ms = <50>;
49 pp1000_dpbrdg: regulator-1v0-dpbrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_dpbrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
56 enable-active-high;
57 regulator-boot-on;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1000_mipibrdg: regulator-1v0-mipibrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1000_mipibrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
69 enable-active-high;
70 regulator-boot-on;
72 vin-supply = <&mt6359_vs2_buck_reg>;
75 pp1800_dpbrdg: regulator-1v8-dpbrdg {
76 compatible = "regulator-fixed";
77 regulator-name = "pp1800_dpbrdg";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
80 enable-active-high;
81 regulator-boot-on;
83 vin-supply = <&mt6359_vio18_ldo_reg>;
87 pp1800_ldo_g: regulator-1v8-g {
88 compatible = "regulator-fixed";
89 regulator-name = "pp1800_ldo_g";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&pp3300_g>;
97 pp1800_mipibrdg: regulator-1v8-mipibrdg {
98 compatible = "regulator-fixed";
99 regulator-name = "pp1800_mipibrdg";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
102 enable-active-high;
103 regulator-boot-on;
105 vin-supply = <&mt6359_vio18_ldo_reg>;
108 pp3300_dpbrdg: regulator-3v3-dpbrdg {
109 compatible = "regulator-fixed";
110 regulator-name = "pp3300_dpbrdg";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
113 enable-active-high;
114 regulator-boot-on;
116 vin-supply = <&pp3300_g>;
120 pp3300_g: regulator-3v3-g {
121 compatible = "regulator-fixed";
122 regulator-name = "pp3300_g";
123 regulator-always-on;
124 regulator-boot-on;
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 vin-supply = <&ppvar_sys>;
131 pp3300_ldo_z: regulator-3v3-z {
132 compatible = "regulator-fixed";
133 regulator-name = "pp3300_ldo_z";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 vin-supply = <&ppvar_sys>;
141 pp3300_mipibrdg: regulator-3v3-mipibrdg {
142 compatible = "regulator-fixed";
143 regulator-name = "pp3300_mipibrdg";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
146 enable-active-high;
147 regulator-boot-on;
149 vin-supply = <&pp3300_g>;
150 off-on-delay-us = <500000>;
154 pp3300_u: regulator-3v3-u {
155 compatible = "regulator-fixed";
156 regulator-name = "pp3300_u";
157 regulator-always-on;
158 regulator-boot-on;
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
162 vin-supply = <&pp3300_g>;
165 pp3300_wlan: regulator-3v3-wlan {
166 compatible = "regulator-fixed";
167 regulator-name = "pp3300_wlan";
168 regulator-always-on;
169 regulator-boot-on;
170 regulator-min-microvolt = <3300000>;
171 regulator-max-microvolt = <3300000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pp3300_wlan_pins>;
174 enable-active-high;
179 pp5000_a: regulator-5v0-a {
180 compatible = "regulator-fixed";
181 regulator-name = "pp5000_a";
182 regulator-always-on;
183 regulator-boot-on;
184 regulator-min-microvolt = <5000000>;
185 regulator-max-microvolt = <5000000>;
186 vin-supply = <&ppvar_sys>;
189 /* system wide semi-regulated power rail from battery or USB */
190 ppvar_sys: regulator-var-sys {
191 compatible = "regulator-fixed";
192 regulator-name = "ppvar_sys";
193 regulator-always-on;
194 regulator-boot-on;
197 reserved_memory: reserved-memory {
198 #address-cells = <2>;
199 #size-cells = <2>;
203 compatible = "shared-dma-pool";
205 no-map;
209 compatible = "restricted-dma-pool";
216 pinctrl-names = "aud_clk_mosi_off",
242 pinctrl-0 = <&aud_clk_mosi_off_pins>;
243 pinctrl-1 = <&aud_clk_mosi_on_pins>;
244 pinctrl-2 = <&aud_dat_mosi_off_pins>;
245 pinctrl-3 = <&aud_dat_mosi_on_pins>;
246 pinctrl-4 = <&aud_dat_miso_off_pins>;
247 pinctrl-5 = <&aud_dat_miso_on_pins>;
248 pinctrl-6 = <&vow_dat_miso_off_pins>;
249 pinctrl-7 = <&vow_dat_miso_on_pins>;
250 pinctrl-8 = <&vow_clk_miso_off_pins>;
251 pinctrl-9 = <&vow_clk_miso_on_pins>;
252 pinctrl-10 = <&aud_nle_mosi_off_pins>;
253 pinctrl-11 = <&aud_nle_mosi_on_pins>;
254 pinctrl-12 = <&aud_dat_miso2_off_pins>;
255 pinctrl-13 = <&aud_dat_miso2_on_pins>;
256 pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
257 pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
258 pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
259 pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
260 pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
261 pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
262 pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
263 pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
264 pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
265 pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
266 pinctrl-24 = <&aud_gpio_tdm_off_pins>;
267 pinctrl-25 = <&aud_gpio_tdm_on_pins>;
276 remote-endpoint = <&anx7625_in>;
280 mediatek,broken-save-restore-fw;
284 mali-supply = <&mt6315_7_vbuck1>;
291 clock-frequency = <400000>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&i2c0_pins>;
297 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&touchscreen_pins>;
306 clock-frequency = <400000>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&i2c1_pins>;
314 clock-frequency = <400000>;
315 clock-stretch-ns = <12600>;
316 pinctrl-names = "default";
317 pinctrl-0 = <&i2c2_pins>;
322 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
323 pinctrl-names = "default";
324 pinctrl-0 = <&trackpad_pins>;
325 vcc-supply = <&pp3300_u>;
326 wakeup-source;
333 clock-frequency = <400000>;
334 pinctrl-names = "default";
335 pinctrl-0 = <&i2c3_pins>;
340 pinctrl-names = "default";
341 pinctrl-0 = <&anx7625_pins>;
342 enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
343 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
344 vdd10-supply = <&pp1000_mipibrdg>;
345 vdd18-supply = <&pp1800_mipibrdg>;
346 vdd33-supply = <&pp3300_mipibrdg>;
349 #address-cells = <1>;
350 #size-cells = <0>;
356 remote-endpoint = <&dsi_out>;
364 remote-endpoint = <&panel_in>;
369 aux-bus {
371 compatible = "edp-panel";
372 power-supply = <&pp3300_mipibrdg>;
377 remote-endpoint = <&anx7625_out>;
388 clock-frequency = <400000>;
389 pinctrl-names = "default";
390 pinctrl-0 = <&i2c7_pins>;
394 domain-supply = <&mt6315_7_vbuck1>;
398 domain-supply = <&mt6359_vsram_others_ldo_reg>;
408 pinctrl-names = "default", "state_uhs";
409 pinctrl-0 = <&mmc0_default_pins>;
410 pinctrl-1 = <&mmc0_uhs_pins>;
411 bus-width = <8>;
412 max-frequency = <200000000>;
413 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
414 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
415 cap-mmc-highspeed;
416 mmc-hs200-1_8v;
417 mmc-hs400-1_8v;
418 supports-cqe;
419 cap-mmc-hw-reset;
420 mmc-hs400-enhanced-strobe;
421 hs400-ds-delay = <0x12814>;
422 no-sdio;
423 no-sd;
424 non-removable;
430 pinctrl-names = "default", "state_uhs";
431 pinctrl-0 = <&mmc1_default_pins>;
432 pinctrl-1 = <&mmc1_uhs_pins>;
433 bus-width = <4>;
434 max-frequency = <200000000>;
435 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
436 vmmc-supply = <&mt6360_ldo5_reg>;
437 vqmmc-supply = <&mt6360_ldo3_reg>;
438 cap-sd-highspeed;
439 sd-uhs-sdr50;
440 sd-uhs-sdr104;
441 no-sdio;
442 no-mmc;
447 regulator-always-on;
451 regulator-always-on;
452 regulator-min-microvolt = <575000>;
453 regulator-max-microvolt = <575000>;
457 regulator-always-on;
461 regulator-min-microvolt = <750000>;
462 regulator-max-microvolt = <800000>;
463 regulator-coupled-with = <&mt6315_7_vbuck1>;
464 regulator-coupled-max-spread = <10000>;
468 regulator-always-on;
472 mediatek,dmic-mode = <1>; /* one-wire */
473 mediatek,mic-type-0 = <2>; /* DMIC */
474 mediatek,mic-type-2 = <2>; /* DMIC */
480 pinctrl-names = "default";
481 pinctrl-0 = <&nor_flash_pins>;
482 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
483 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
486 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
488 spi-max-frequency = <52000000>;
489 spi-rx-bus-width = <2>;
490 spi-tx-bus-width = <2>;
495 pinctrl-names = "default";
496 pinctrl-0 = <&pcie_pins>;
501 num-lanes = <1>;
502 bus-range = <0x1 0x1>;
504 #address-cells = <3>;
505 #size-cells = <2>;
511 memory-region = <&wifi_restricted_dma_region>;
518 gpio-line-names = "I2S_DP_LRCK",
743 anx7625_pins: anx7625-default-pins {
744 pins-out {
745 pinmux = <PINMUX_GPIO41__FUNC_GPIO41>,
747 output-low;
750 pins-in {
751 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
752 input-enable;
753 bias-pull-up;
757 aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
758 pins-mosi-off {
759 pinmux = <PINMUX_GPIO214__FUNC_GPIO214>,
764 aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
765 pins-mosi-on {
766 pinmux = <PINMUX_GPIO214__FUNC_AUD_CLK_MOSI>,
768 drive-strength = <10>;
772 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
773 pins-miso-off {
774 pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
778 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
779 pins-miso-on {
780 pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
784 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
785 pins-miso-off {
786 pinmux = <PINMUX_GPIO218__FUNC_GPIO218>,
791 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
792 pins-miso-on {
793 pinmux = <PINMUX_GPIO218__FUNC_AUD_DAT_MISO0>,
795 drive-strength = <10>;
799 aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
800 pins-miso-off {
801 pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
805 aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
806 pins-miso-on {
807 pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
811 aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
812 pins-mosi-off {
813 pinmux = <PINMUX_GPIO196__FUNC_GPIO196>;
817 aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
818 pins-mosi-on {
819 pinmux = <PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2>;
823 aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
824 pins-mosi-off {
825 pinmux = <PINMUX_GPIO216__FUNC_GPIO216>,
830 aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
831 pins-mosi-on {
832 pinmux = <PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0>,
834 drive-strength = <10>;
838 aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
839 pins-i2s3-off {
840 pinmux = <PINMUX_GPIO32__FUNC_GPIO32>,
846 aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
847 pins-i2s3-on {
848 pinmux = <PINMUX_GPIO32__FUNC_I2S3_BCK>,
854 aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
855 pins-i2s8-off {
856 pinmux = <PINMUX_GPIO10__FUNC_GPIO10>,
863 aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
864 pins-i2s8-on {
865 pinmux = <PINMUX_GPIO10__FUNC_I2S8_MCK>,
872 aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
873 pins-i2s9-off {
874 pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
878 aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
879 pins-i2s9-on {
880 pinmux = <PINMUX_GPIO29__FUNC_I2S9_DO>;
884 aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
885 pins-tdm-off {
886 pinmux = <PINMUX_GPIO0__FUNC_GPIO0>,
893 aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
894 pins-tdm-on {
895 pinmux = <PINMUX_GPIO0__FUNC_TDM_LRCK>,
902 aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
903 pins-nle-mosi-off {
904 pinmux = <PINMUX_GPIO197__FUNC_GPIO197>,
909 aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
910 pins-nle-mosi-on {
911 pinmux = <PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1>,
916 cr50_int: cr50-irq-default-pins {
917 pins-gsc-ap-int-odl {
918 pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
919 input-enable;
923 cros_ec_int: cros-ec-irq-default-pins {
924 pins-ec-ap-int-odl {
925 pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
926 input-enable;
927 bias-pull-up;
931 i2c0_pins: i2c0-default-pins {
932 pins-bus {
933 pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
935 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
936 drive-strength-microamp = <1000>;
940 i2c1_pins: i2c1-default-pins {
941 pins-bus {
942 pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
944 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
945 drive-strength-microamp = <1000>;
949 i2c2_pins: i2c2-default-pins {
950 pins-bus {
951 pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
953 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
957 i2c3_pins: i2c3-default-pins {
958 pins-bus {
959 pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
961 bias-disable;
962 drive-strength-microamp = <1000>;
966 i2c7_pins: i2c7-default-pins {
967 pins-bus {
968 pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
970 bias-disable;
971 drive-strength-microamp = <1000>;
975 mmc0_default_pins: mmc0-default-pins {
976 pins-cmd-dat {
977 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
986 input-enable;
987 drive-strength = <8>;
988 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
991 pins-clk {
992 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
993 drive-strength = <8>;
994 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
997 pins-rst {
998 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
999 drive-strength = <8>;
1000 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1004 mmc0_uhs_pins: mmc0-uhs-pins {
1005 pins-cmd-dat {
1006 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
1015 input-enable;
1016 drive-strength = <10>;
1017 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1020 pins-clk {
1021 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
1022 drive-strength = <10>;
1023 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1026 pins-rst {
1027 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
1028 drive-strength = <8>;
1029 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1032 pins-ds {
1033 pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>;
1034 drive-strength = <10>;
1035 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1039 mmc1_default_pins: mmc1-default-pins {
1040 pins-cmd-dat {
1041 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
1046 input-enable;
1047 drive-strength = <8>;
1048 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1051 pins-clk {
1052 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
1053 drive-strength = <8>;
1054 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1057 pins-insert {
1058 pinmux = <PINMUX_GPIO17__FUNC_GPIO17>;
1059 input-enable;
1060 bias-pull-up;
1064 mmc1_uhs_pins: mmc1-uhs-pins {
1065 pins-cmd-dat {
1066 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
1071 input-enable;
1072 drive-strength = <8>;
1073 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1076 pins-clk {
1077 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
1078 input-enable;
1079 drive-strength = <8>;
1080 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1084 nor_flash_pins: nor-flash-default-pins {
1085 pins-cs-io1 {
1086 pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>,
1088 input-enable;
1089 bias-pull-up;
1090 drive-strength = <10>;
1093 pins-io0 {
1094 pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>;
1095 bias-pull-up;
1096 drive-strength = <10>;
1099 pins-clk {
1100 pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>;
1101 input-enable;
1102 bias-pull-up;
1103 drive-strength = <10>;
1107 pcie_pins: pcie-default-pins {
1108 pins-pcie-wake {
1109 pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
1110 bias-pull-up;
1113 pins-pcie-pereset {
1114 pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>;
1117 pins-pcie-clkreq {
1118 pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>;
1119 bias-pull-up;
1122 pins-wifi-kill {
1123 pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */
1124 output-high;
1128 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
1129 pins-en {
1130 pinmux = <PINMUX_GPIO19__FUNC_GPIO19>;
1131 output-low;
1135 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
1136 pins-en {
1137 pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
1138 output-low;
1142 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
1143 pins-en {
1144 pinmux = <PINMUX_GPIO126__FUNC_GPIO126>;
1145 output-low;
1149 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
1150 pins-en {
1151 pinmux = <PINMUX_GPIO128__FUNC_GPIO128>;
1152 output-low;
1156 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
1157 pins-en {
1158 pinmux = <PINMUX_GPIO26__FUNC_GPIO26>;
1159 output-low;
1163 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
1164 pins-en {
1165 pinmux = <PINMUX_GPIO127__FUNC_GPIO127>;
1166 output-low;
1170 pp3300_wlan_pins: pp3300-wlan-pins {
1171 pins-pcie-en-pp3300-wlan {
1172 pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
1173 output-high;
1177 pwm0_pins: pwm0-default-pins {
1178 pins-pwm {
1179 pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>;
1182 pins-inhibit {
1183 pinmux = <PINMUX_GPIO152__FUNC_GPIO152>;
1184 output-high;
1188 scp_pins: scp-pins {
1189 pins-vreq-vao {
1190 pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
1194 spi1_pins: spi1-default-pins {
1195 pins-cs-mosi-clk {
1196 pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
1199 bias-disable;
1202 pins-miso {
1203 pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
1204 bias-pull-down;
1208 spi5_pins: spi5-default-pins {
1209 pins-bus {
1210 pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
1214 bias-disable;
1218 trackpad_pins: trackpad-default-pins {
1219 pins-int-n {
1220 pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
1221 input-enable;
1222 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
1226 touchscreen_pins: touchscreen-default-pins {
1227 pins-irq {
1228 pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
1229 input-enable;
1230 bias-pull-up;
1233 pins-reset {
1234 pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
1235 output-high;
1238 pins-report-sw {
1239 pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
1240 output-low;
1244 vow_clk_miso_off_pins: vow-clk-miso-off-pins {
1245 pins-miso-off {
1246 pinmux = <PINMUX_GPIO219__FUNC_GPIO219>;
1250 vow_clk_miso_on_pins: vow-clk-miso-on-pins {
1251 pins-miso-on {
1252 pinmux = <PINMUX_GPIO219__FUNC_VOW_CLK_MISO>;
1256 vow_dat_miso_off_pins: vow-dat-miso-off-pins {
1257 pins-miso-off {
1258 pinmux = <PINMUX_GPIO218__FUNC_GPIO218>;
1262 vow_dat_miso_on_pins: vow-dat-miso-on-pins {
1263 pins-miso-on {
1264 pinmux = <PINMUX_GPIO218__FUNC_VOW_DAT_MISO>;
1270 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
1276 pinctrl-names = "default";
1277 pinctrl-0 = <&pwm0_pins>;
1283 firmware-name = "mediatek/mt8192/scp.img";
1284 memory-region = <&scp_mem_reserved>;
1285 pinctrl-names = "default";
1286 pinctrl-0 = <&scp_pins>;
1288 cros-ec {
1289 compatible = "google,cros-ec-rpmsg";
1290 mediatek,rpmsg-name = "cros-ec-rpmsg";
1297 mediatek,pad-select = <0>;
1298 pinctrl-names = "default";
1299 pinctrl-0 = <&spi1_pins>;
1302 compatible = "google,cros-ec-spi";
1304 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
1305 spi-max-frequency = <3000000>;
1306 pinctrl-names = "default";
1307 pinctrl-0 = <&cros_ec_int>;
1309 #address-cells = <1>;
1310 #size-cells = <0>;
1313 compatible = "google,cros-ec-pwm";
1314 #pwm-cells = <1>;
1319 i2c_tunnel: i2c-tunnel {
1320 compatible = "google,cros-ec-i2c-tunnel";
1321 google,remote-bus = <0>;
1322 #address-cells = <1>;
1323 #size-cells = <0>;
1327 compatible = "google,cros-ec-regulator";
1329 regulator-min-microvolt = <1800000>;
1330 regulator-max-microvolt = <3300000>;
1334 compatible = "google,cros-ec-regulator";
1336 regulator-min-microvolt = <3300000>;
1337 regulator-max-microvolt = <3300000>;
1341 compatible = "google,cros-ec-typec";
1342 #address-cells = <1>;
1343 #size-cells = <0>;
1346 compatible = "usb-c-connector";
1349 power-role = "dual";
1350 data-role = "host";
1351 try-power-role = "source";
1355 compatible = "usb-c-connector";
1358 power-role = "dual";
1359 data-role = "host";
1360 try-power-role = "source";
1369 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1370 mediatek,pad-select = <0>;
1371 pinctrl-names = "default";
1372 pinctrl-0 = <&spi5_pins>;
1377 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1378 spi-max-frequency = <1000000>;
1379 pinctrl-names = "default";
1380 pinctrl-0 = <&cr50_int>;
1385 #address-cells = <2>;
1386 #size-cells = <0>;
1389 compatible = "mediatek,mt6315-regulator";
1394 regulator-name = "Vbcpu";
1395 regulator-min-microvolt = <400000>;
1396 regulator-max-microvolt = <1193750>;
1397 regulator-enable-ramp-delay = <256>;
1398 regulator-allowed-modes = <0 1 2>;
1399 regulator-always-on;
1403 regulator-name = "Vlcpu";
1404 regulator-min-microvolt = <400000>;
1405 regulator-max-microvolt = <1193750>;
1406 regulator-enable-ramp-delay = <256>;
1407 regulator-allowed-modes = <0 1 2>;
1408 regulator-always-on;
1414 compatible = "mediatek,mt6315-regulator";
1419 regulator-name = "Vgpu";
1420 regulator-min-microvolt = <400000>;
1421 regulator-max-microvolt = <800000>;
1422 regulator-enable-ramp-delay = <256>;
1423 regulator-allowed-modes = <0 1 2>;
1424 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
1425 regulator-coupled-max-spread = <10000>;
1438 wakeup-source;
1439 vusb33-supply = <&pp3300_g>;
1440 vbus-supply = <&pp5000_a>;
1443 #include <arm/cros-ec-keyboard.dtsi>
1444 #include <arm/cros-ec-sbs.dtsi>