dts/mediatek/mt8183-kukui.dtsi

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 		stdout-path = "serial0:115200n8";
25 		compatible = "pwm-backlight";
27 		power-supply = <&bl_pp5000>;
28 		enable-gpios = <&pio 176 0>;
29 		brightness-levels = <0 1023>;
30 		num-interpolated-steps = <1023>;
31 		default-brightness-level = <576>;
41 		compatible = "fixed-clock";
42 		#clock-cells = <0>;
43 		clock-frequency = <32768>;
44 		clock-output-names = "clk32k";
48 		compatible = "regulator-fixed";
49 		regulator-name = "it6505_pp18";
50 		regulator-min-microvolt = <1800000>;
51 		regulator-max-microvolt = <1800000>;
53 		enable-active-high;
57 		compatible = "regulator-fixed";
58 		regulator-name = "lcd_pp3300";
59 		regulator-min-microvolt = <3300000>;
60 		regulator-max-microvolt = <3300000>;
61 		regulator-always-on;
62 		regulator-boot-on;
66 		compatible = "regulator-fixed";
67 		regulator-name = "bl_pp5000";
68 		regulator-min-microvolt = <5000000>;
69 		regulator-max-microvolt = <5000000>;
70 		regulator-always-on;
71 		regulator-boot-on;
75 		compatible = "regulator-fixed";
76 		regulator-name = "mmc1_power";
77 		regulator-min-microvolt = <3300000>;
78 		regulator-max-microvolt = <3300000>;
82 		compatible = "regulator-fixed";
83 		regulator-name = "mmc1_io";
84 		regulator-min-microvolt = <1800000>;
85 		regulator-max-microvolt = <1800000>;
89 		compatible = "regulator-fixed";
90 		regulator-name = "pp1800_alw";
91 		regulator-always-on;
92 		regulator-boot-on;
93 		regulator-min-microvolt = <1800000>;
94 		regulator-max-microvolt = <1800000>;
98 		compatible = "regulator-fixed";
99 		regulator-name = "pp3300_alw";
100 		regulator-always-on;
101 		regulator-boot-on;
102 		regulator-min-microvolt = <3300000>;
103 		regulator-max-microvolt = <3300000>;
106 	reserved_memory: reserved-memory {
107 		#address-cells = <2>;
108 		#size-cells = <2>;
112 			compatible = "shared-dma-pool";
114 			no-map;
118 	sound: mt8183-sound {
120 		pinctrl-names = "default",
123 		pinctrl-0 = <&aud_pins_default>;
124 		pinctrl-1 = <&aud_pins_tdm_out_on>;
125 		pinctrl-2 = <&aud_pins_tdm_out_off>;
129 	btsco: bt-sco {
130 		compatible = "linux,bt-sco";
133 	wifi_pwrseq: wifi-pwrseq {
134 		compatible = "mmc-pwrseq-simple";
135 		pinctrl-names = "default";
136 		pinctrl-0 = <&wifi_pins_pwrseq>;
139 		reset-gpios = <&pio 119 1>;
142 	wifi_wakeup: wifi-wakeup {
143 		compatible = "gpio-keys";
144 		pinctrl-names = "default";
145 		pinctrl-0 = <&wifi_pins_wakeup>;
147 		button-wowlan {
151 			wakeup-source;
155 	tboard_thermistor1: thermal-sensor1 {
156 		compatible = "generic-adc-thermal";
157 		#thermal-sensor-cells = <0>;
158 		io-channels = <&auxadc 0>;
159 		io-channel-names = "sensor-channel";
160 		temperature-lookup-table = <    (-5000) 1553
189 	tboard_thermistor2: thermal-sensor2 {
190 		compatible = "generic-adc-thermal";
191 		#thermal-sensor-cells = <0>;
192 		io-channels = <&auxadc 1>;
193 		io-channel-names = "sensor-channel";
194 		temperature-lookup-table = <    (-5000) 1553
229 	proc-supply = <&mt6358_vproc12_reg>;
233 	proc-supply = <&mt6358_vproc12_reg>;
237 	proc-supply = <&mt6358_vproc12_reg>;
241 	proc-supply = <&mt6358_vproc12_reg>;
245 	proc-supply = <&mt6358_vproc12_reg>;
249 	proc-supply = <&mt6358_vproc11_reg>;
253 	proc-supply = <&mt6358_vproc11_reg>;
257 	proc-supply = <&mt6358_vproc11_reg>;
261 	proc-supply = <&mt6358_vproc11_reg>;
266 	#address-cells = <1>;
267 	#size-cells = <0>;
271 		enable-gpios = <&pio 45 0>;
272 		pinctrl-names = "default";
273 		pinctrl-0 = <&panel_pins_default>;
274 		avdd-supply = <&ppvarn_lcd>;
275 		avee-supply = <&ppvarp_lcd>;
276 		pp1800-supply = <&pp1800_lcd>;
281 				remote-endpoint = <&dsi_out>;
289 				remote-endpoint = <&panel_in>;
296 	mediatek,broken-save-restore-fw;
300 	mali-supply = <&mt6358_vgpu_reg>;
304 	pinctrl-names = "default";
305 	pinctrl-0 = <&i2c0_pins>;
307 	clock-frequency = <400000>;
308 	#address-cells = <1>;
309 	#size-cells = <0>;
313 	pinctrl-names = "default";
314 	pinctrl-0 = <&i2c1_pins>;
316 	clock-frequency = <100000>;
320 	pinctrl-names = "default";
321 	pinctrl-0 = <&i2c3_pins>;
323 	clock-frequency = <100000>;
324 	#address-cells = <1>;
325 	#size-cells = <0>;
329 	pinctrl-names = "default";
330 	pinctrl-0 = <&i2c5_pins>;
332 	clock-frequency = <100000>;
333 	#address-cells = <1>;
334 	#size-cells = <0>;
338 	pinctrl-names = "default";
339 	pinctrl-0 = <&i2c6_pins>;
341 	clock-frequency = <100000>;
350 	pinctrl-names = "default", "state_uhs";
351 	pinctrl-0 = <&mmc0_pins_default>;
352 	pinctrl-1 = <&mmc0_pins_uhs>;
353 	bus-width = <8>;
354 	max-frequency = <200000000>;
355 	cap-mmc-highspeed;
356 	mmc-hs200-1_8v;
357 	mmc-hs400-1_8v;
358 	cap-mmc-hw-reset;
359 	no-sdio;
360 	no-sd;
361 	hs400-ds-delay = <0x12814>;
362 	vmmc-supply = <&mt6358_vemc_reg>;
363 	vqmmc-supply = <&mt6358_vio18_reg>;
364 	assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
365 	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
366 	non-removable;
371 	pinctrl-names = "default", "state_uhs";
372 	pinctrl-0 = <&mmc1_pins_default>;
373 	pinctrl-1 = <&mmc1_pins_uhs>;
374 	vmmc-supply = <&mmc1_fixed_power>;
375 	vqmmc-supply = <&mmc1_fixed_io>;
376 	mmc-pwrseq = <&wifi_pwrseq>;
377 	bus-width = <4>;
378 	max-frequency = <200000000>;
379 	cap-sd-highspeed;
380 	sd-uhs-sdr50;
381 	sd-uhs-sdr104;
382 	keep-power-in-suspend;
383 	wakeup-source;
384 	cap-sdio-irq;
385 	non-removable;
386 	no-mmc;
387 	no-sd;
388 	assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
389 	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
390 	#address-cells = <1>;
391 	#size-cells = <0>;
393 	qca_wifi: qca-wifi@1 {
400 	regulator-always-on;
404 	Avdd-supply = <&mt6358_vaud28_reg>;
408 	regulator-max-microvolt = <900000>;
410 	regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
411 	regulator-coupled-max-spread = <100000>;
415 	regulator-min-microvolt = <2700000>;
416 	regulator-max-microvolt = <2700000>;
420 	regulator-min-microvolt = <2700000>;
421 	regulator-max-microvolt = <2700000>;
425 	regulator-min-microvolt = <850000>;
426 	regulator-max-microvolt = <1000000>;
428 	regulator-coupled-with = <&mt6358_vgpu_reg>;
429 	regulator-coupled-max-spread = <100000>;
434 		pins-bus {
456 		pins-bus {
462 				<PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
463 			drive-strength = <MTK_DRIVE_6mA>;
468 		pins-bus {
475 			input-enable;
476 			bias-pull-down;
477 			drive-strength = <MTK_DRIVE_2mA>;
481 	bt_pins: bt-pins {
482 		pins-bt-en {
484 			output-low;
488 	ec_ap_int_odl: ec-ap-int-odl {
491 			input-enable;
492 			bias-pull-up;
496 	h1_int_od_l: h1-int-od-l {
499 			input-enable;
504 		pins-bus {
507 			mediatek,pull-up-adv = <3>;
508 			mediatek,drive-strength-adv = <00>;
513 		pins-bus {
516 			mediatek,pull-up-adv = <3>;
517 			mediatek,drive-strength-adv = <00>;
522 		pins-bus {
525 			bias-disable;
526 			mediatek,drive-strength-adv = <00>;
531 		pins-bus {
534 			mediatek,pull-up-adv = <3>;
535 			mediatek,drive-strength-adv = <00>;
540 		pins-bus {
543 			bias-disable;
544 			mediatek,drive-strength-adv = <00>;
549 		pins-bus {
552 			mediatek,pull-up-adv = <3>;
553 			mediatek,drive-strength-adv = <00>;
558 		pins-bus {
561 			bias-disable;
565 	mmc0_pins_default: mmc0-pins-default {
566 		pins-cmd-dat {
576 			input-enable;
577 			drive-strength = <MTK_DRIVE_14mA>;
578 			mediatek,pull-up-adv = <01>;
581 		pins-clk {
583 			drive-strength = <MTK_DRIVE_14mA>;
584 			mediatek,pull-down-adv = <10>;
587 		pins-rst {
589 			drive-strength = <MTK_DRIVE_14mA>;
590 			mediatek,pull-down-adv = <01>;
594 	mmc0_pins_uhs: mmc0-pins-uhs {
595 		pins-cmd-dat {
605 			input-enable;
606 			drive-strength = <MTK_DRIVE_14mA>;
607 			mediatek,pull-up-adv = <01>;
610 		pins-clk {
612 			drive-strength = <MTK_DRIVE_14mA>;
613 			mediatek,pull-down-adv = <10>;
616 		pins-ds {
618 			drive-strength = <MTK_DRIVE_14mA>;
619 			mediatek,pull-down-adv = <10>;
622 		pins-rst {
624 			drive-strength = <MTK_DRIVE_14mA>;
625 			mediatek,pull-up-adv = <01>;
629 	mmc1_pins_default: mmc1-pins-default {
630 		pins-cmd-dat {
636 			input-enable;
637 			mediatek,pull-up-adv = <10>;
640 		pins-clk {
642 			input-enable;
643 			mediatek,pull-down-adv = <10>;
647 	mmc1_pins_uhs: mmc1-pins-uhs {
648 		pins-cmd-dat {
654 			drive-strength = <MTK_DRIVE_6mA>;
655 			input-enable;
656 			mediatek,pull-up-adv = <10>;
659 		pins-clk {
661 			drive-strength = <MTK_DRIVE_8mA>;
662 			mediatek,pull-down-adv = <10>;
663 			input-enable;
667 	panel_pins_default: panel-pins-default {
668 		panel-reset {
670 			output-low;
671 			bias-pull-up;
675 	pwm0_pin_default: pwm0-pin-default {
678 			output-high;
679 			bias-pull-up;
687 		pins-scp-uart {
694 		pins-spi {
699 			bias-disable;
704 		pins-spi {
709 			bias-disable;
714 		pins-spi {
718 			bias-disable;
720 		pins-spi-mi {
722 			mediatek,pull-down-adv = <00>;
727 		pins-spi {
732 			bias-disable;
737 		pins-spi {
742 			bias-disable;
747 		pins-spi {
752 			bias-disable;
756 	uart0_pins_default: uart0-pins-default {
757 		pins-rx {
759 			input-enable;
760 			bias-pull-up;
762 		pins-tx {
767 	uart1_pins_default: uart1-pins-default {
768 		pins-rx {
770 			input-enable;
771 			bias-pull-up;
773 		pins-tx {
776 		pins-rts {
779 		pins-cts {
781 			input-enable;
785 	uart1_pins_sleep: uart1-pins-sleep {
786 		pins-rx {
788 			input-enable;
789 			bias-pull-up;
791 		pins-tx {
794 		pins-rts {
797 		pins-cts {
799 			input-enable;
803 	wifi_pins_pwrseq: wifi-pins-pwrseq {
804 		pins-wifi-enable {
806 			output-low;
810 	wifi_pins_wakeup: wifi-pins-wakeup {
811 		pins-wifi-wakeup {
813 			input-enable;
820 	pinctrl-names = "default";
821 	pinctrl-0 = <&pwm0_pin_default>;
827 	firmware-name = "mediatek/mt8183/scp.img";
828 	pinctrl-names = "default";
829 	pinctrl-0 = <&scp_pins>;
832 		compatible = "google,cros-ec-rpmsg";
833 		mediatek,rpmsg-name = "cros-ec-rpmsg";
838 	domain-supply = <&mt6358_vsram_gpu_reg>;
842 	domain-supply = <&mt6358_vgpu_reg>;
850 	pinctrl-names = "default";
851 	pinctrl-0 = <&spi0_pins>;
852 	mediatek,pad-select = <0>;
854 	cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
859 		spi-max-frequency = <1000000>;
860 		pinctrl-names = "default";
861 		pinctrl-0 = <&h1_int_od_l>;
862 		interrupt-parent = <&pio>;
868 	pinctrl-names = "default";
869 	pinctrl-0 = <&spi1_pins>;
870 	mediatek,pad-select = <0>;
874 		compatible = "winbond,w25q64dw", "jedec,spi-nor";
876 		spi-max-frequency = <25000000>;
881 	pinctrl-names = "default";
882 	pinctrl-0 = <&spi2_pins>;
883 	mediatek,pad-select = <0>;
886 	cros_ec: cros-ec@0 {
887 		compatible = "google,cros-ec-spi";
889 		spi-max-frequency = <3000000>;
890 		interrupt-parent = <&pio>;
892 		pinctrl-names = "default";
893 		pinctrl-0 = <&ec_ap_int_odl>;
895 		i2c_tunnel: i2c-tunnel {
896 			compatible = "google,cros-ec-i2c-tunnel";
897 			google,remote-bus = <1>;
898 			#address-cells = <1>;
899 			#size-cells = <0>;
903 			compatible = "google,extcon-usbc-cros-ec";
904 			google,usb-port-id = <0>;
908 			compatible = "google,cros-ec-typec";
909 			#address-cells = <1>;
910 			#size-cells = <0>;
913 				compatible = "usb-c-connector";
915 				power-role = "dual";
916 				data-role = "host";
917 				try-power-role = "sink";
924 	pinctrl-names = "default";
925 	pinctrl-0 = <&spi3_pins>;
926 	mediatek,pad-select = <0>;
931 	pinctrl-names = "default";
932 	pinctrl-0 = <&spi4_pins>;
933 	mediatek,pad-select = <0>;
938 	pinctrl-names = "default";
939 	pinctrl-0 = <&spi5_pins>;
940 	mediatek,pad-select = <0>;
946 	wakeup-source;
947 	vusb33-supply = <&mt6358_vusb_reg>;
953 		polling-delay = <1000>; /* milliseconds */
954 		polling-delay-passive = <0>; /* milliseconds */
955 		thermal-sensors = <&tboard_thermistor1>;
959 		polling-delay = <1000>; /* milliseconds */
960 		polling-delay-passive = <0>; /* milliseconds */
961 		thermal-sensors = <&tboard_thermistor2>;
970 	pinctrl-names = "default";
971 	pinctrl-0 = <&uart0_pins_default>;
976 	pinctrl-names = "default", "sleep";
977 	pinctrl-0 = <&uart1_pins_default>;
978 	pinctrl-1 = <&uart1_pins_sleep>;
980 	/delete-property/ interrupts;
981 	interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
985 		pinctrl-names = "default";
986 		pinctrl-0 = <&bt_pins>;
988 		compatible = "qcom,qca6174-bt";
989 		enable-gpios = <&pio 120 0>;
991 		firmware-name = "nvm_00440302_i2s.bin";
996 	#address-cells = <1>;
997 	#size-cells = <0>;
998 	vusb33-supply = <&mt6358_vusb_reg>;
1007 #include <arm/cros-ec-sbs.dtsi>