Lines Matching +full:0 +full:x0000004d
23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
63 cache-size = <0x100000>;
79 arm,psci-suspend-param = <0x0>;
88 #clock-cells = <0>;
95 #clock-cells = <0>;
102 #clock-cells = <0>;
118 offset = <0>;
119 mask = <0x02>;
144 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
145 <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
148 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
153 reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
161 thermal-sensors = <&tmu 0>;
216 reg = <0x0 0x1080000 0x0 0x1000>;
225 reg = <0x0 0x1e00000 0x0 0x10000>;
226 ranges = <0x0 0x0 0x1e00000 0x10000>;
231 reg = <0x900 0x4>;
232 #clock-cells = <0>;
233 clocks = <&clockgen QORIQ_CLK_HWACCEL 0>;
240 reg = <0x0 0x1e60000 0x0 0x10000>;
246 reg = <0x0 0x1e80000 0x0 0x10000>;
254 reg = <0x1c 0x8>;
260 reg = <0x0 0x1fc0000 0x0 0x10000>;
266 reg = <0x0 0x1300000 0x0 0xa0000>;
274 #size-cells = <0>;
275 reg = <0x0 0x2000000 0x0 0x10000>;
285 #size-cells = <0>;
286 reg = <0x0 0x2010000 0x0 0x10000>;
296 #size-cells = <0>;
297 reg = <0x0 0x2020000 0x0 0x10000>;
307 #size-cells = <0>;
308 reg = <0x0 0x2030000 0x0 0x10000>;
318 #size-cells = <0>;
319 reg = <0x0 0x2040000 0x0 0x10000>;
329 #size-cells = <0>;
330 reg = <0x0 0x2050000 0x0 0x10000>;
340 #size-cells = <0>;
341 reg = <0x0 0x2060000 0x0 0x10000>;
351 #size-cells = <0>;
352 reg = <0x0 0x2070000 0x0 0x10000>;
362 #size-cells = <0>;
363 reg = <0x0 0x20c0000 0x0 0x10000>,
364 <0x0 0x20000000 0x0 0x10000000>;
373 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
375 #size-cells = <0>;
376 reg = <0x0 0x2100000 0x0 0x10000>;
381 dmas = <&edma0 0 62>, <&edma0 0 60>;
389 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
391 #size-cells = <0>;
392 reg = <0x0 0x2110000 0x0 0x10000>;
397 dmas = <&edma0 0 58>, <&edma0 0 56>;
405 compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
407 #size-cells = <0>;
408 reg = <0x0 0x2120000 0x0 0x10000>;
413 dmas = <&edma0 0 54>, <&edma0 0 2>;
422 reg = <0x0 0x2140000 0x0 0x10000>;
424 clock-frequency = <0>; /* fixed up by bootloader */
435 reg = <0x0 0x2150000 0x0 0x10000>;
437 clock-frequency = <0>; /* fixed up by bootloader */
449 reg = <0x0 0x2180000 0x0 0x10000>;
461 reg = <0x0 0x2190000 0x0 0x10000>;
473 reg = <0x00 0x21c0500 0x0 0x100>;
482 reg = <0x00 0x21c0600 0x0 0x100>;
492 reg = <0x0 0x2260000 0x0 0x1000>;
505 reg = <0x0 0x2270000 0x0 0x1000>;
518 reg = <0x0 0x2280000 0x0 0x1000>;
531 reg = <0x0 0x2290000 0x0 0x1000>;
544 reg = <0x0 0x22a0000 0x0 0x1000>;
557 reg = <0x0 0x22b0000 0x0 0x1000>;
571 reg = <0x0 0x22c0000 0x0 0x10000>,
572 <0x0 0x22d0000 0x0 0x10000>,
573 <0x0 0x22e0000 0x0 0x10000>;
587 reg = <0x0 0x2300000 0x0 0x10000>;
598 reg = <0x0 0x2310000 0x0 0x10000>;
609 reg = <0x0 0x2320000 0x0 0x10000>;
620 reg = <0x0 0x3100000 0x0 0x10000>;
623 snps,quirk-frame-length-adjustment = <0x20>;
630 reg = <0x0 0x3110000 0x0 0x10000>;
633 snps,quirk-frame-length-adjustment = <0x20>;
640 reg = <0x0 0x3200000 0x0 0x10000>,
641 <0x7 0x100520 0x0 0x4>;
651 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
652 <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
662 bus-range = <0x0 0xff>;
663 ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
664 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
667 interrupt-map-mask = <0 0 0 7>;
668 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
669 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
670 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
671 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
672 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
678 reg = <0x00 0x03400000 0x0 0x00100000
679 0x80 0x00000000 0x8 0x00000000>;
690 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
691 <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
701 bus-range = <0x0 0xff>;
702 ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
703 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
706 interrupt-map-mask = <0 0 0 7>;
707 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
708 <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
709 <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
710 <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
711 iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
717 reg = <0x00 0x03500000 0x0 0x00100000
718 0x88 0x00000000 0x8 0x00000000>;
729 reg = <0 0x5000000 0 0x800000>;
733 stream-match-mask = <0x7c00>;
742 /* performance counter interrupts 0-7 */
781 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
785 ranges = <0x0 0x00 0x8000000 0x100000>;
786 reg = <0x00 0x8000000 0x0 0x100000>;
791 compatible = "fsl,sec-v5.0-job-ring",
792 "fsl,sec-v4.0-job-ring";
793 reg = <0x10000 0x10000>;
798 compatible = "fsl,sec-v5.0-job-ring",
799 "fsl,sec-v4.0-job-ring";
800 reg = <0x20000 0x10000>;
805 compatible = "fsl,sec-v5.0-job-ring",
806 "fsl,sec-v4.0-job-ring";
807 reg = <0x30000 0x10000>;
812 compatible = "fsl,sec-v5.0-job-ring",
813 "fsl,sec-v4.0-job-ring";
814 reg = <0x40000 0x10000>;
821 reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
822 <0x0 0x8390000 0x0 0x10000>, /* Status regs */
823 <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
833 block-offset = <0x10000>;
841 reg = <0x0 0xc000000 0x0 0x1000>;
851 reg = <0x0 0xc010000 0x0 0x1000>;
861 reg = <0x0 0xf080000 0x0 0x10000>;
862 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
863 <0 223 IRQ_TYPE_LEVEL_HIGH>;
871 arm,malidp-arqos-value = <0xd000d000>;
882 reg = <0x0 0xf0c0000 0x0 0x10000>;
892 #sound-dai-cells = <0>;
894 reg = <0x0 0xf100000 0x0 0x10000>;
913 #sound-dai-cells = <0>;
915 reg = <0x0 0xf110000 0x0 0x10000>;
934 #sound-dai-cells = <0>;
936 reg = <0x0 0xf120000 0x0 0x10000>;
955 #sound-dai-cells = <0>;
957 reg = <0x0 0xf130000 0x0 0x10000>;
976 #sound-dai-cells = <0>;
978 reg = <0x0 0xf140000 0x0 0x10000>;
997 #sound-dai-cells = <0>;
999 reg = <0x0 0xf150000 0x0 0x10000>;
1019 reg = <0x0 0xf1f0000 0x0 0x10000>;
1020 #clock-cells = <0>;
1026 reg = <0x0 0x1f80000 0x0 0x10000>;
1027 interrupts = <0 23 0x4>;
1028 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
1029 fsl,tmu-calibration = <0x00000000 0x00000024
1030 0x00000001 0x0000002b
1031 0x00000002 0x00000031
1032 0x00000003 0x00000038
1033 0x00000004 0x0000003f
1034 0x00000005 0x00000045
1035 0x00000006 0x0000004c
1036 0x00000007 0x00000053
1037 0x00000008 0x00000059
1038 0x00000009 0x00000060
1039 0x0000000a 0x00000066
1040 0x0000000b 0x0000006d
1042 0x00010000 0x0000001c
1043 0x00010001 0x00000024
1044 0x00010002 0x0000002c
1045 0x00010003 0x00000035
1046 0x00010004 0x0000003d
1047 0x00010005 0x00000045
1048 0x00010006 0x0000004d
1049 0x00010007 0x00000055
1050 0x00010008 0x0000005e
1051 0x00010009 0x00000066
1052 0x0001000a 0x0000006e
1054 0x00020000 0x00000018
1055 0x00020001 0x00000022
1056 0x00020002 0x0000002d
1057 0x00020003 0x00000038
1058 0x00020004 0x00000043
1059 0x00020005 0x0000004d
1060 0x00020006 0x00000058
1061 0x00020007 0x00000063
1062 0x00020008 0x0000006e
1064 0x00030000 0x00000010
1065 0x00030001 0x0000001c
1066 0x00030002 0x00000029
1067 0x00030003 0x00000036
1068 0x00030004 0x00000042
1069 0x00030005 0x0000004f
1070 0x00030006 0x0000005b
1071 0x00030007 0x00000068>;
1078 reg = <0x01 0xf0000000 0x0 0x100000>;
1083 bus-range = <0x0 0x0>;
1085 msi-map = <0 &its 0x17 0xe>;
1086 iommu-map = <0 &smmu 0x17 0xe>;
1088 ranges = <0x82000000 0x1 0xf8000000 0x1 0xf8000000 0x0 0x160000
1090 0xc2000000 0x1 0xf8160000 0x1 0xf8160000 0x0 0x070000
1092 0x82000000 0x1 0xf81d0000 0x1 0xf81d0000 0x0 0x020000
1094 0xc2000000 0x1 0xf81f0000 0x1 0xf81f0000 0x0 0x020000
1096 0x82000000 0x1 0xf8210000 0x1 0xf8210000 0x0 0x020000
1098 0xc2000000 0x1 0xf8230000 0x1 0xf8230000 0x0 0x020000
1100 0x82000000 0x1 0xfc000000 0x1 0xfc000000 0x0 0x400000>;
1102 enetc_port0: ethernet@0,0 {
1104 reg = <0x000000 0 0 0 0>;
1108 enetc_port1: ethernet@0,1 {
1110 reg = <0x000100 0 0 0 0>;
1114 enetc_port2: ethernet@0,2 {
1116 reg = <0x000200 0 0 0 0>;
1127 enetc_mdio_pf3: mdio@0,3 {
1129 reg = <0x000300 0 0 0 0>;
1131 #size-cells = <0>;
1134 ethernet@0,4 {
1136 reg = <0x000400 0 0 0 0>;
1142 mscc_felix: ethernet-switch@0,5 {
1143 reg = <0x000500 0 0 0 0>;
1150 #size-cells = <0>;
1153 mscc_felix_port0: port@0 {
1154 reg = <0>;
1202 enetc_port3: ethernet@0,6 {
1204 reg = <0x000600 0 0 0 0>;
1215 rcec@1f,0 {
1216 reg = <0x00f800 0 0 0 0>;
1225 reg = <0x01 0xf0800000 0x0 0x10000>;
1231 reg = <0x0 0x2800000 0x0 0x10000>;
1242 reg = <0x0 0x2810000 0x0 0x10000>;
1253 reg = <0x0 0x2820000 0x0 0x10000>;
1264 reg = <0x0 0x2830000 0x0 0x10000>;
1275 reg = <0x0 0x2840000 0x0 0x10000>;
1286 reg = <0x0 0x2850000 0x0 0x10000>;
1297 reg = <0x0 0x2860000 0x0 0x10000>;
1308 reg = <0x0 0x2870000 0x0 0x10000>;
1318 reg = <0x0 0x1e34040 0x0 0x1c>;
1325 reg = <0x0 0x2800000 0x0 0x10000>;
1326 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
1333 reg = <0x0 0x2810000 0x0 0x10000>;
1334 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;